AD9852ASVZ Analog Devices Inc, AD9852ASVZ Datasheet - Page 19

• Manufacturer Part Number: AD9852ASVZ
• Description: IC DDS SYNTHESIZER CMOS 80-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9852ASVZ

• Resolution (bits): 12 b
• Master Fclk: 300MHz
• Tuning Word Width (bits): 48 b
• Voltage - Supply: 3.14 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Transmitting Current: 815mA
• Rf Ic Case Style: TQFP
• No. Of Pins: 80
• Supply Voltage Range: 3.135V To 3.465V
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 3 - 168 Hours
• Frequency Max: 300MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9852/PCBZ - BOARD EVAL FOR AD9852
• Lead Free Status / Rohs Status: Compliant

Table 7. Function Availability vs. Mode of Operation
Function
Phase Adjust 1
Phase Adjust 2
Single-Pin FSK/BPSK or HOLD
Single-Pin Output Shaped Keying
Phase Offset or Modulation
Amplitude Control or Modulation
Inverse Sinc Filter
Frequency Tuning Word 1
Frequency Tuning Word 2
Automatic Frequency Sweep
UNRAMPED FSK (MODE 001)
When this mode is selected, the output frequency of the DDS is
a function of the values loaded into Frequency Tuning Word
Register 1 and Frequency Tuning Word Register 2 and the logic
level of Pin 29 (FSK/BPSK/HOLD). A logic low on Pin 29
chooses F1 (Frequency Tuning Word 1, Parallel Address 4 hex
to Parallel Address 9 hex), and a logic high chooses F2
(Frequency Tuning Word 2, Parallel Register Address A hex to
Parallel Register Address F hex). Changes in frequency are
phase continuous and are internally coincident with the FSK
data pin (Pin 29); however, there is deterministic pipeline delay
between the FSK data signal and the DAC output (see Table 1).
The unramped FSK mode (see Figure 33) is representative
of traditional FSK, radio teletype (RTTY), or teletype (TTY)
transmission of digital data. FSK is a very reliable means of
digital communication; however, it makes inefficient use of
the bandwidth in the RF spectrum. Ramped FSK, shown in
Figure 34, is a method of conserving the bandwidth.
FSK DATA (PIN 29)
I/O UD CLK
MODE
TW1
TW2
FREQUENCY
000 (DEFAULT)
F2
F1
0
0
0
Single-Tone Mode
Figure 33. Unramped (Traditional) FSK Mode
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FSK Mode
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001 (FSK NO RAMP)
RAMPED FSK (MODE 010)
In this method of FSK, changes from F1 to F2 are not
instantaneous, but are accomplished in a frequency sweep or
ramped fashion. The ramped notation implies the sweep is
linear. Although linear sweeping, or frequency ramping, is
easily and automatically accomplished, it is only one of many
possibilities. Other frequency transition schemes can be
implemented by changing the ramp rate and ramp step size at
any time during operation.
Frequency ramping, whether linear or nonlinear, necessitates
that many intermediate frequencies between F1 and F2 are
output in addition to the primary F1 and F2 frequencies.
Figure 34 and Figure 35 graphically depict the frequency vs.
time characteristics of a linear ramped FSK signal.
In ramped FSK mode, the delta frequency word (DFW) is
required to be programmed as a positive twos complement
value. Another requirement is that the lowest frequency (F1) be
programmed in the Frequency Tuning Word 1 registers.
F1
F2
Ramped FSK Mode
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Chirp Mode
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BPSK Mode
AD9852
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