AD9852ASVZ Analog Devices Inc, AD9852ASVZ Datasheet - Page 8

• Manufacturer Part Number: AD9852ASVZ
• Description: IC DDS SYNTHESIZER CMOS 80-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9852ASVZ

• Resolution (bits): 12 b
• Master Fclk: 300MHz
• Tuning Word Width (bits): 48 b
• Voltage - Supply: 3.14 V ~ 3.47 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Transmitting Current: 815mA
• Rf Ic Case Style: TQFP
• No. Of Pins: 80
• Supply Voltage Range: 3.135V To 3.465V
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 3 - 168 Hours
• Frequency Max: 300MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9852/PCBZ - BOARD EVAL FOR AD9852
• Lead Free Status / Rohs Status: Compliant

AD9852
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Maximum Junction Temperature
V
Digital Inputs
Digital Output Current
Storage Temperature
Operating Temperature
Lead Temperature (Soldering, 10 sec)
Maximum Clock Frequency (ASVZ)
Maximum Clock Frequency (ASTZ)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
The heat sink of the AD9852ASVZ 80-lead TQFP package must
be soldered to the PCB.
Table 3.
Thermal Characteristic
θ
θ
θ
Ψ
θ
1
2
3
4
5
6
7
Per JEDEC JESD51-2 (heat sink soldered to PCB).
2S2P JEDEC test board.
Values of θ
considerations.
Per JEDEC JESD51-6 (heat sink soldered to PCB).
Airflow increases heat dissipation, effectively reducing θ
more metal that is directly in contact with the package leads from metal
traces through holes, ground, and power planes, the more θ
Per MIL-Std 883, Method 1012.1.
Values of θ
considerations when an external heat sink is required.
JA
JMA
JMA
JC
S
JT
6, 7
1, 2
(0 m/sec airflow)
(1.0 m/sec airflow)
(2.5 m/sec airflow)
JA
JC
are provided for package comparison and PCB design
are provided for package comparison and PCB design
1, 2, 3
2, 3, 4, 5
2, 3, 4, 5
TQFP
16.2°C/W
13.7°C/W
12.8°C/W
0.3°C/W
2.0°C/W
Rating
4 V
−0.7 V to +V
5 mA
−65°C to +150°C
−40°C to +85°C
150°C
300°C
300 MHz
200 MHz
JA
. Furthermore, the
LQFP
38°C/W
JA
is reduced.
S
Rev. E | Page 8 of 52
To determine the junction temperature on the application PCB
use the following equation:
where:
T
T
measured by the user at the top center of the package.
Ψ
PD is the power dissipation (PD); see the Power Dissipation and
Thermal Considerations section for the method to calculate PD.
EXPLANATION OF TEST LEVELS
Table 4.
Test Level
I
III
IV
V
VI
ESD CAUTION
J
case
JT
is the junction temperature expressed in degrees Celsius.
= 0.3°C/W.
is the case temperature expressed in degrees Celsius, as
T
J
= T
case
+ (
Description
100% production tested.
Sample tested only.
Parameter is guaranteed by design and
characterization testing.
Parameter is a typical value only.
Devices are 100% production tested at 25°C and
guaranteed by design and characterization testing
for industrial operating temperature range.
Ψ
JT
× PD)