PIC16F688-I/P Microchip Technology Inc., PIC16F688-I/P Datasheet - Page 11

• Manufacturer Part Number: PIC16F688-I/P
• Description: 14 PIN, 7 KB FLASH, 256 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F688-I/P

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 2-1:
© 2006 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Addr
1:
2:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTC
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
BAUDCTL
SPBRGH
SPBRG
RCREG
TXREG
TXSTA
RCSTA
WDTCON
CMCON0
CMCON1
ADRESH
ADCON0
Name
—
—
—
—
—
—
—
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
MCLR and WDT Reset does not affect the previous value data latch. The RAIF bit will be cleared upon Reset but will set again if the
mismatched exists.
PIC16F688 SPECIAL REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1
Holding Register for the Most Significant Byte of the 16-bit TMR1
USART Baud Rate High Generator
USART Baud Rate Generator
USART Receive Register
USART Transmit Register
Unimplemented
Unimplemented
Unimplemented
Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result
ABDOVF
T1GINV
C2OUT
CSRC
ADFM
SPEN
Bit 7
EEIF
IRP
GIE
—
—
—
—
—
TMR1GE
C1OUT
RCIDL
VCFG
PEIE
ADIF
Bit 6
RP1
RX9
TX9
—
—
—
—
—
T1CKPS1
C2INV
TXEN
SREN
RCIF
Bit 5
RC5
T0IE
RP0
RA5
—
—
—
—
—
Write Buffer for upper 5 bits of Program Counter
T1CKPS0
WDTPS3
C1INV
SCKP
SYNC
CREN
CHS2
INTE
Bit 4
C2IF
RA4
RC4
TO
—
T1OSCEN
WDTPS2
ADDEN
SENDB
BRG16
CHS1
RAIE
Bit 3
C1IF
RC3
RA3
CIS
PD
—
WDTPS1
T1SYNC
OSFIF
BRGH
FERR
CHS0
Bit 2
T0IF
CM2
RA2
RC2
—
—
Z
GO/DONE
TMR1CS
WDTPS0
T1GSS
OERR
TRMT
WUE
Bit 1
INTF
TXIF
RC1
CM1
RA1
DC
SWDTEN
TMR1ON
C2SYNC
TMR1IF
ABDEN
RAIF
ADON
RX9D
TX9D
Bit 0
CM0
RA0
RC0
C
PIC16F688
(2)
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--x0 x000
--xx 0000
---0 0000
0000 000x
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
01-0 0-00
0000 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
---0 1000
0000 0000
---- --10
xxxx xxxx
00-0 0000
POR/BOR
Value on
—
—
—
—
—
—
—
DS41203C-page 9
124, 117
20, 117
45, 117
19, 117
13, 117
20, 117
33, 117
42, 117
19, 117
15, 117
17, 117
48, 117
48, 117
51, 117
94, 117
95, 117
95, 117
87, 117
87, 117
92, 117
93, 117
61, 117
62, 117
72, 117
71, 117
Page
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