PIC16F684-I/P Microchip Technology Inc., PIC16F684-I/P Datasheet - Page 70

• Manufacturer Part Number: PIC16F684-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F684-I/P

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F684
9.2
9.2.1
To enable the ADC module, the ADON bit of the
ADCON0 register must be set to a ‘1’. Setting the
GO/DONE bit of the ADCON0 register to a ‘1’ will start
the analog-to-digital conversion.
9.2.2
When the conversion is complete, the ADC module will:
• Clear the GO/DONE bit
• Set the ADIF flag bit
• Update the ADRESH:ADRESL registers with new
9.2.3
If a conversion must be terminated before completion,
the GO/DONE bit can be cleared in software. The
ADRESH:ADRESL registers will not be updated with
the partially complete analog-to-digital conversion
sample. Instead, the ADRESH:ADRESL register pair
will retain the value of the previous conversion. Addi-
tionally, a 2 T
sition can be initiated. Following this delay, an input
acquisition is automatically started on the selected
channel.
9.2.4
The ADC module can operate during Sleep. This
requires the ADC clock source to be set to the F
option. When the F
ADC waits one additional instruction before starting the
conversion. This allows the SLEEP instruction to be
executed, which can reduce system noise during the
conversion. If the ADC interrupt is enabled, the device
will wake-up from Sleep when the conversion
completes. If the ADC interrupt is disabled, the ADC
module is turned off after the conversion completes,
although the ADON bit remains set.
When the ADC clock source is something other than
F
sion to be aborted and the ADC module is turned off,
although the ADON bit remains set.
DS41202D-page 68
RC
Note:
conversion result
Note:
, a SLEEP instruction causes the present conver-
ADC Operation
STARTING A CONVERSION
The GO/DONE bit should not be set in the
same instruction that turns on the ADC.
Refer to Section 9.2.6 “A/D Conversion
Procedure”.
COMPLETION OF A CONVERSION
TERMINATING A CONVERSION
A device Reset forces all registers to their
Reset state. Thus, the ADC module is
turned off and any pending conversion is
terminated.
ADC OPERATION DURING SLEEP
AD
delay is required before another acqui-
RC
clock source is selected, the
RC
9.2.5
The ECCP Special Event Trigger allows periodic ADC
measurements without software intervention. When
this trigger occurs, the GO/DONE bit is set by hardware
and the Timer1 counter resets to zero.
Using the Special Event Trigger does not ensure
proper ADC timing. It is the user’s responsibility to
ensure that the ADC timing requirements are met.
See
pare/PWM (With Auto-Shutdown and Dead Band)
Module” for more information.
9.2.6
This is an example procedure for using the ADC to
perform an Analog-to-Digital conversion:
1.
2.
3.
4.
5.
6.
7.
8.
Note 1: The global interrupt can be disabled if the
Configure Port:
• Disable pin output driver (See TRIS register)
• Configure pin as analog
Configure the ADC module:
• Select ADC conversion clock
• Configure voltage reference
• Select ADC input channel
• Select result format
• Turn on ADC module
Configure ADC interrupt (optional):
• Clear ADC interrupt flag
• Enable ADC interrupt
• Enable peripheral interrupt
• Enable global interrupt
Wait the required acquisition time
Start conversion by setting the GO/DONE bit.
Wait for ADC conversion to complete by one of
the following:
• Polling the GO/DONE bit
• Waiting for the ADC interrupt (interrupts
Read ADC Result
Clear the ADC interrupt flag (required if interrupt
is enabled).
enabled)
Section 11.0
2: See
SPECIAL EVENT TRIGGER
A/D CONVERSION PROCEDURE
user is attempting to wake-up from Sleep
and resume in-line code execution.
Requirements”.
Section 9.3
© 2006 Microchip Technology Inc.
“Enhanced
(1)
“A/D
(2)
Capture/Com-
.
Acquisition