USB1T11AMTCX Fairchild Semiconductor, USB1T11AMTCX Datasheet

TRANSCEIVER UNIV BUS 14TSSOP

USB1T11AMTCX

Manufacturer Part Number
USB1T11AMTCX
Description
TRANSCEIVER UNIV BUS 14TSSOP
Manufacturer
Fairchild Semiconductor
Type
Transceiverr
Datasheet

Specifications of USB1T11AMTCX

Number Of Drivers/receivers
1/1
Protocol
USB 1.1
Voltage - Supply
3.3V
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Data Rate
12Mbps
Supply Current
5mA
Supply Voltage Range
3V To 3.6V
Driver Case Style
TSSOP
No. Of Pins
14
Operating Temperature Range
-40°C To +85°C
Interface
USB
Filter Terminals
SMD
Rohs Compliant
Yes
Data Rate Max
12Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
USB1T11AMTCXTR

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© 1999 Fairchild Semiconductor Corporation
USB1T11A • Rev. 1.0.4
USB1T11A — Universal Serial Bus Transceiver
Features
Ordering Information
USB1T11AM
USB1T11AMX
USB1T11AMTC
USB1T11AMTCX
Complies with Universal Serial Bus Specification 1.1
Utilizes Digital Inputs and Outputs to Transmit and
Receive USB Cable Data
Supports 12Mbit/s “Full Speed” and 1.5Mbit/s
“Low Speed” Serial Data Transmission
Compatible with the VHDL “Serial Interface Engine”
from USB Implementers' Forum
Supports Single-ended Data Interface
Single 3.3V Supply
ESD Performance: Human Body Model
>9.5kV on D-, D+ pins only
>4kV on all other pins
Part Number
Temperature
-40 to +85°C
Operating
Range
V
MO
SPEED
/F
RCV
/OE
SE0
V
V
M
P
14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC
MS-012, 0.150-Inch Narrow
14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC
MS-012, 0.150-Inch Narrow
14-Lead, Thin Shrink Small Outline Package (TSSOP),
JEDEC MO-153, 4.4mm Wide
14-Lead, Thin Shrink Small Outline Package (TSSOP),
JEDEC MO-153, 4.4mm Wide
Figure 1. Logic Diagram
Description
The USB1T11A is a one-chip, generic USB transceiver.
It is designed to allow 5.0V or 3.3V programmable and
standard logic to interface with the physical layer of the
Universal Serial Bus. It is capable of transmitting and
receiving serial data at both full-speed (12Mbit/s) and
low-speed (1.5Mbit/s) data rates.
The input and output signals of the USB1T11A conform
with the “Serial Interface Engine.” Implementation of the
serial interface engine allows designers to make USB-
compatible devices with off-the-shelf logic to modify and
update the application.
+
-
Package
D-
D+
August 2010
www.fairchildsemi.com
Packing
Tape and
Tape and
Method
Tube
Tube
Reel
Reel

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USB1T11AMTCX Summary of contents

Page 1

... Part Number Temperature Range USB1T11AM USB1T11AMX -40 to +85°C USB1T11AMTC USB1T11AMTCX © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 Description The USB1T11A is a one-chip, generic USB transceiver designed to allow 5.0V or 3.3V programmable and standard logic to interface with the physical layer of the Universal Serial Bus ...

Page 2

... Edge Rate Control. Logic “1” operates at edge rates for “full speed.” Logic “0” Speed I operates edge rates for “low speed.” V 3.0 to 3.6 power supply. CC GND Ground reference. © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 MODE /OE 2 ...

Page 3

... Functional Truth Table Input Mode SEO Don’t Don’t Don’t Care Care Care Don’t Don’t Don’t Care Care Care © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 I/O /OE SUSPND 3-State 3-State 1 1 3-State 3-State 3 Outputs ...

Page 4

... Absolute Maximum Ratings. Symbol V Power Supply Operating CC V Input Voltage IN V Input Range for AI/0 AI/O V Output Voltage O T Operating Ambient Temperature, Free Air A © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 Parameter <0V IN > < RCV Pins P M D+/D- Pins ...

Page 5

... Resistance Match Notes: 2. This specification is guaranteed by design and statistical process distribution. 3. Excludes external resistor. To comply with USB specification 1.1, external series resistors of 24W ±1% each on D+ and D- are recommended. © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 Conditions Min. I =4mA OL I =20µ ...

Page 6

... Driver Enable Delay (/OE to D+/D-) PZH, PZL Receiver Timings Receiver Propagation Delay PLH PHL (D+/D- to RVC) Single-ended Receiver Delay PLH PHL (D+/ © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 = kΩ Conditions 10 and 90%, Figure Figure 4 Figure 6 Figure 6 Figure 5 Figure 5 Figure 5 = 1.5kΩ ...

Page 7

... Full Speed L C =200pF, Full Speed (Minimum Timing =600pF, Full Speed (Maximum Timing) L 1.5kΩ on D-(Low Speed (Full Speed) only. © 1999 Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0 and RCV Figure 8. Load for Enable and Disable Times P Test ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 9

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 10

... Fairchild Semiconductor Corporation USB1T11A • Rev. 1.0.4 10 www.fairchildsemi.com ...

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