PIC32MX795F512L-80I/PT Microchip Technology Inc., PIC32MX795F512L-80I/PT Datasheet - Page 111

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PIC32MX795F512L-80I/PT

Manufacturer Part Number
PIC32MX795F512L-80I/PT
Description
512KB Flash, 128KB RAM, 80 MHz, USB, ENET, 2xCAN, 8 DMA
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC32MX795F512L-80I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Eeprom Memory
0 Bytes
Input Output
85
Interface
CAN/I2C/SPI/UART/USB
Memory Type
Flash
Number Of Bits
32
Package Type
100-pin TQFP
Programmable Memory
512K Bytes
Ram Size
128K Bytes
Speed
80 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.3-3.6 V

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0
TABLE 4-47:
Legend:
Note
90E0
9100
9120
9130
9140
9150
9160
9200
9210
9220
9230
9240
9250
9110
RXOVFLOW
FRMTXOK
SCOLFRM
MCOLFRM
FRMRXOK
ALGNERR
ETHSTAT
FCSERR
1:
2:
EMACx
EMACx
EMACx
EMACx
EMACx
EMACx
MAXF
CFG1
CFG2
CLRT
IPGT
IPGR
ETH
ETH
ETH
ETH
ETH
ETH
ETH
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table (with the exception of ETHSTAT) have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
INV Registers”
Reset values default to the factory programmed value.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
ETHERNET CONTROLLER REGISTER SUMMARY FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX664F064L,
PIC32MX664F128L, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H,
PIC32MX795F512H, PIC32MX695F512L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX764F128H, PIC32MX764F128L,
PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES
RESET
31/15
SOFT
for more information.
EXCESS
RESET
30/14
DFR
SIM
NOBKOFF
29/13
BP
NOBKOFF
28/12
NB2BIPKTGP1<6:0>
RESET
27/11
RMCS
CWINDOW<5:0>
RESET
26/10
RFUN
LONGPRE PUREPRE
RESET
TMCS
25/9
MCOLFRMCNT<15:0>
FRMRXOKCNT<15:0>
RXOVFLWCNT<15:0>
FRMTXOKCNT<15:0>
SCOLFRMCNT<15:0>
ALGNERRCNT<15:0>
RESET
FCSERRCNT<15:0>
TFUN
24/8
MACMAXF<15:0>
Bits
AUTOPAD
BUSY
23/7
VLANPAD
TXBUSY
22/6
(1)
(CONTINUED)
RXBUSY
ENABLE
21/5
PAD
LOOPBACK TXPAUSE
ENABLE
20/4
CRC
BUFCNT<7:0>
NB2BIPKTGP2<6:0>
B2BIPKTGP<6:0>
DELAYCRC HUGEFRM LENGTHCK FULLDPLX
19/3
RXPAUSE
18/2
RETX<3:0>
Section 12.1.1 “CLR, SET and
PASSALL
17/1
RXENABLE
16/0
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
800D
0000
4082
0000
0012
0000
0C12
0000
370F
0000
05EE

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