PIC32MX795F512L-80I/PT Microchip Technology Inc., PIC32MX795F512L-80I/PT Datasheet - Page 133

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PIC32MX795F512L-80I/PT

Manufacturer Part Number
PIC32MX795F512L-80I/PT
Description
512KB Flash, 128KB RAM, 80 MHz, USB, ENET, 2xCAN, 8 DMA
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC32MX795F512L-80I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Eeprom Memory
0 Bytes
Input Output
85
Interface
CAN/I2C/SPI/UART/USB
Memory Type
Flash
Number Of Bits
32
Package Type
100-pin TQFP
Programmable Memory
512K Bytes
Ram Size
128K Bytes
Speed
80 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.3-3.6 V

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PIC32MX795F512L-80I/PT
0
14.0
This family of PIC32 devices features four synchronous
16-bit timers (default) that can operate as a free-
running interval timer for various timing applications
and counting external events. The following modes are
supported:
• Synchronous internal 16-bit timer
• Synchronous internal 16-bit gated timer
• Synchronous external 16-bit timer
FIGURE 14-1:
© 2010 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1: ADC event trigger is available on Timer3 only.
Trigger
2: Some registers and associated bits
ADC Event
TIMER2/3, TIMER4/5
TxIF
Event Flag
TxCK
2: TxCK pins are not available on 64-pin devices.
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105)
Reference Manual” , which is available
from
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
(2)
(1)
TGATE (TxCON<7>)
the
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
0
1
of
Microchip
Reset
Equal
the
“PIC32
Comparator x 16
web
TMRx
PRx
Family
site
Q
Q
in
PBCLK
Gate
Sync
D
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous internal 32-bit timer
• Synchronous internal 32-bit gated timer
• Synchronous external 32-bit timer
14.1
• Selectable clock prescaler
• Timers operational during CPU idle
• Time base for Input Capture and Output Compare
• ADC event trigger (Timer3 only)
• Fast bit manipulation using CLR, SET and INV
PIC32MX5XX/6XX/7XX
Note:
modules (Timer2 and Timer3 only)
registers
Additional Supported Features
1 0
x 1
0 0
In this chapter, references to registers,
TxCON, TMRx and PRx, use ‘x’ to repre-
sent Timer2 through 5 in 16-bit modes. In
32-bit modes, ‘x’ represents Timer2 or 4;
‘y’ represents Timer3 or 5.
TCS (TxCON<1>)
TGATE (TxCON<7>)
ON (TxCON<15>)
TCKPS (TxCON<6:4>)
1, 2, 4, 8, 16,
32, 64, 256
Prescaler
Sync
DS61156F-page 133
3

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