PIC32MX795F512L-80I/PT Microchip Technology Inc., PIC32MX795F512L-80I/PT Datasheet - Page 151

• Manufacturer Part Number: PIC32MX795F512L-80I/PT
• Description: 512KB Flash, 128KB RAM, 80 MHz, USB, ENET, 2xCAN, 8 DMA
• Manufacturer: Microchip Technology Inc.

Specifications of PIC32MX795F512L-80I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: CAN/I2C/SPI/UART/USB
• Memory Type: Flash
• Number Of Bits: 32
• Package Type: 100-pin TQFP
• Programmable Memory: 512K Bytes
• Ram Size: 128K Bytes
• Speed: 80 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.3-3.6 V

23.0
The Controller Area Network (CAN) module supports
the following key features:
• Standards Compliance:
FIGURE 23-1:
© 2010 Microchip Technology Inc.
- Full CAN 2.0B compliance
- Programmable bit rate up to 1 Mbps
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
CONTROLLER AREA
NETWORK (CAN)
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 34. “Controller
Area Network (CAN)” (DS61154) in the
“PIC32 Family Reference Manual” , which
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
is available from the Microchip web site
(www.microchip.com/PIC32).
CxTX
CxRX
PIC32 CAN MODULE BLOCK DIAGRAM
Message Buffer 31
Message Buffer 1
Message Buffer 0
FIFO0
CAN Module
32 Filters
4 Masks
CAN Message FIFO (up to 32 FIFOs)
Message Buffer 31
Message Buffer 1
Message Buffer 0
System Bus
System RAM
FIFO1
in
• Message Reception and Transmission:
• Additional Features:
Figure 23-1
module.
PIC32MX5XX/6XX/7XX
- 32 message FIFOs
- Each FIFO can have up to 32 messages for a
- FIFO can be a transmit message FIFO or a
- User-defined priority levels for message
- 32 acceptance filters for message filtering
- Four acceptance filter mask registers for
- Automatic response to remote transmit request
- DeviceNet™ addressing support
- Loopback, Listen All Messages and Listen
- Low-power operating modes
- CAN module is a bus master on the PIC32
- Use of DMA is not required
- Dedicated time-stamp timer
- Dedicated DMA channels
- Data-only Message Reception mode
total of 1024 messages
receive message FIFO
FIFOs used for transmission
message filtering
Only modes for self-test, system diagnostics
and bus monitoring
system bus
Message Buffer 31
Message Buffer 1
Message Buffer 0
CPU
illustrates the general structure of the CAN
FIFO31
2 or 4 Words
Buffer Size
Message
DS61156F-page 151