M25P80-VMW6G STMicroelectronics, M25P80-VMW6G Datasheet

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M25P80-VMW6G

Manufacturer Part Number
M25P80-VMW6G
Description
M25P80 CMOST7X 2P-3MSO 08 WIDE .208 (EIAJ)
Manufacturer
STMicroelectronics
Datasheet

Specifications of M25P80-VMW6G

Lead Free Status / Rohs Status
RoHS Compliant part

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M25P80-VMW6G SO8
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FEATURES SUMMARY
August 2004
8 Mbit of Flash Memory
Page Program (up to 256 Bytes) in 1.4ms
(typical)
Sector Erase (512 Kbit) in 1s (typical)
Bulk Erase (8 Mbit) in 10s (typical)
2.7 to 3.6V Single Supply Voltage
SPI Bus Compatible Serial Interface
40MHz Clock Rate (maximum)
Deep Power-down Mode 1 A (typical)
Electronic Signature (13h)
8 Mbit, Low Voltage, Serial Flash Memory
Figure 1. Packages
With 40MHz SPI Bus Interface
VDFPN8 (MP)
300 mil width
200 mil width
SO16 (MF)
SO8 (MW)
8
(MLP8)
1
M25P80
1/41

Related parts for M25P80-VMW6G

M25P80-VMW6G Summary of contents

Page 1

... SPI Bus Compatible Serial Interface 40MHz Clock Rate (maximum) Deep Power-down Mode 1 A (typical) Electronic Signature (13h) August 2004 8 Mbit, Low Voltage, Serial Flash Memory With 40MHz SPI Bus Interface Figure 1. Packages M25P80 VDFPN8 (MP) (MLP8) SO16 (MF) 300 mil width 8 1 SO8 (MW) ...

Page 2

... M25P80 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. VDFPN and SO8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 4. SO16 Connections SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Serial Data Output ( Serial Data Input ( Serial Clock ( Chip Select ( Hold (HOLD Write Protect ( SPI MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 5 ...

Page 3

... Figure 21.Power-up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 7. Power-Up Timing and VWI Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 INITIAL DELIVERY STATE MAXIMUM RATING Table 8. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 DC AND AC PARAMETERS Table 9. Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 10. Data Retention and Endurance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 11. Capacitance Table 12. DC Characteristics (Device Grade Table 13. DC Characteristics (Device Grade M25P80 3/41 ...

Page 4

... M25P80 Table 14. Instruction Times (Device Grade Table 15. Instruction Times (Device Grade Table 16. AC Measurement Conditions Figure 22.AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 17. AC Characteristics (25MHz Operation, Device Grade Table 18. AC Characteristics (40MHz Operation, Device Grade Figure 23.Serial Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 24.Write Protect Setup and Hold Timing during WRSR when SRWD Figure 25 ...

Page 5

... SUMMARY DESCRIPTION The M25P80 Mbit ( Serial Flash Memory, with advanced write protection mecha- nisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction. The memory is organized as 16 sectors, each con- taining 256 pages ...

Page 6

... M25P80 SIGNAL DESCRIPTION Serial Data Output (Q). This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C). Serial Data Input (D). This input signal is used to transfer data serially into the device. It receives in- structions, addresses, and the data to be pro- grammed ...

Page 7

... Stand-by mode and not transferring data: – C remains at 0 for (CPOL=0, CPHA=0) – C remains at 1 for (CPOL=1, CPHA= SPI Memory SPI Memory Device Device HOLD W M25P80 SPI Memory Device S HOLD W HOLD AI03746D MSB AI01438B 7/41 ...

Page 8

... M25P80 OPERATING FEATURES Page Programming To program one data byte, two instructions are re- quired: Write Enable (WREN), which is one byte, and a Page Program (PP) sequence, which con- sists of four bytes plus data. This is followed by the internal Program cycle (of duration t To spread this overhead, the Page Program (PP) ...

Page 9

... The environments where non-volatile memory de- vices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the M25P80 boasts the following data protection mechanisms: Power-On Reset and an internal timer (t can provide protection against inadvertant changes while the power supply is outside the operating specification ...

Page 10

... M25P80 Hold Condition The Hold (HOLD) signal is used to pause any se- rial communications with the device without reset- ting the clocking sequence. However, taking this signal Low does not terminate any Write Status Register, Program or Erase cycle that is currently in progress. To enter the Hold condition, the device must be selected, with Chip Select (S) Low ...

Page 11

... Bulk Erasable (bits are erased from but not Page Erasable. Address Range F0000h E0000h D0000h C0000h B0000h A0000h 90000h 80000h 70000h 60000h 50000h 40000h 30000h 20000h 10000h 00000h M25P80 FFFFFh EFFFFh DFFFFh CFFFFh BFFFFh AFFFFh 9FFFFh 8FFFFh 7FFFFh 6FFFFh 5FFFFh 4FFFFh 3FFFFh 2FFFFh 1FFFFh 0FFFFh 11/41 ...

Page 12

... M25P80 Figure 8. Block Diagram HOLD W Control Logic Address Register and Counter 12/41 High Voltage Generator I/O Shift Register 256 Byte Data Buffer 00000h 256 Bytes (Page Size) X Decoder Status Register FFFFFh Size of the read-only memory area 000FFh AI04987 ...

Page 13

... Status Register cycle, Program cycle or Erase cy- cle continues unaffected. One-byte Instruction Code 0000 0110 0000 0100 0000 0101 0000 0001 0000 0011 0000 1011 0000 0010 1101 1000 1100 0111 1011 1001 1010 1011 M25P80 Address Dummy Data Bytes Bytes Bytes 06h 0 0 04h 0 0 05h ...

Page 14

... M25P80 Write Enable (WREN) The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit. The Write Enable Latch (WEL) bit must be set pri every Page Program (PP), Sector Erase Figure 9. Write Enable (WREN) Instruction Sequence Write Disable (WRDI) The Write Disable (WRDI) instruction resets the Write Enable Latch (WEL) bit ...

Page 15

... Low). In this mode, the non-volatile bits of the Status Register (SRWD, BP2, BP1, BP0) become read-only bits and the Write Status Register (WRSR) instruction is no longer accepted for execution Status Register Out MSB Table 2.) becomes protect- Status Register Out MSB AI02031E M25P80 15/41 ...

Page 16

... M25P80 Write Status Register (WRSR) The Write Status Register (WRSR) instruction al- lows new values to be written to the Status Regis- ter. Before it can be accepted, a Write Enable (WREN) instruction must previously have been ex- ecuted. After the Write Enable (WREN) instruction has been decoded and executed, the device sets the Write Enable Latch (WEL) ...

Page 17

... If Write Protect (W) is permanently tied High, the Hardware Protected Mode (HPM) can never be activated, and only the Software Protected Mode (SPM), using the Block Protect (BP2, BP1, BP0) bits of the Status Register, can be used. M25P80 Memory Content 1 1 Unprotected Area Ready to accept Page ...

Page 18

... M25P80 Read Data Bytes (READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being latched-in during the rising edge of Serial Clock (C). Then the mem- ...

Page 19

... High at any time during data output. Any Read Data Bytes at Higher Speed (FAST_READ) in- struction, while an Erase, Program or Write cycle Figure 14 progress, is rejected without having any ef- fects on the cycle that is in progress BIT ADDRESS DATA OUT MSB Data Bytes at Higher 47 DATA OUT MSB MSB M25P80 Speed AI04006 19/41 ...

Page 20

... M25P80 Page Program (PP) The Page Program (PP) instruction allows bytes to be programmed in the memory (changing bits from 1 to 0). Before it can be accepted, a Write Enable (WREN) instruction must previously have been ex- ecuted. After the Write Enable (WREN) instruction has been decoded, the device sets the Write En- able Latch (WEL) ...

Page 21

... Write Enable Latch (WEL) bit is reset. A Sector Erase (SE) instruction applied to a page which is protected by the Block Protect (BP2, BP1, Figure 16.. BP0) bits (see ed Instruction 24 Bit Address 23 22 MSB ) is initiated. While the Sector Erase cy- SE Table 3. and Table 2.) is not execut AI03751D M25P80 21/41 ...

Page 22

... M25P80 Bulk Erase (BE) The Bulk Erase (BE) instruction sets all bits to 1 (FFh). Before it can be accepted, a Write Enable (WREN) instruction must previously have been ex- ecuted. After the Write Enable (WREN) instruction has been decoded, the device sets the Write En- able Latch (WEL). ...

Page 23

... Power-down mode is entered. Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in progress, is re- jected without having any effects on the cycle that is in progress Instruction Stand-by Mode CC2 DP Deep Power-down Mode M25P80 Figure 18.. before the DP and the Deep AI03753D 23/41 ...

Page 24

... C Instruction D High Impedance Q Note: The value of the 8-bit Electronic Signature, for the M25P80, is 13h. 24/41 Data Input (D) during the rising edge of Serial Clock (C). Then, the 8-bit Electronic Signature, stored in the memory, is shifted out on Serial Data Output (Q), each bit being shifted out during the falling edge of Serial Clock (C) ...

Page 25

... Stand-by Power mode is delayed by t Fig- (S) must remain High for at least t specified in mode, the device waits to be selected, so that it can receive, decode and execute instructions. M25P80 Stand-by Mode AI04078B , and Chip Select RES1 (max), as RES1 Table 17 ...

Page 26

... M25P80 POWER-UP AND POWER-DOWN At Power-up and Power-down, the device must not be selected (that is Chip Select (S) must follow the voltage applied until V CC correct value: – V (min) at Power-up, and then for a further CC delay of t VSL – Power-down SS Usually a simple pull-up resistor on Chip Select (S) can be used to insure safe and proper Power-up and Power-down ...

Page 27

... The device is delivered with the memory array erased: all bits are set to 1 (each byte contains tVSL Read Access allowed tPUW Threshold WI Parameter FFh). The Status Register contains 00h (all Status Register bits are 0). M25P80 Device fully accessible time AI04009C Min. Max. Unit 10 µs ...

Page 28

... M25P80 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings" table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not im- Table 8 ...

Page 29

... Parameter Condition 1 1 (at 85°C) Test Condition OUT =25°C and a frequency of 20MHz. A M25P80 Min. Max. Unit 2.7 3.6 V –40 85 °C –40 125 Min. Max. Unit 100 000 cycles per ...

Page 30

... M25P80 Table 12. DC Characteristics (Device Grade 6) Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Standby Current CC1 I Deep Power-down Current CC2 I Operating Current (READ) CC3 I Operating Current (PP) CC4 I Operating Current (WRSR) CC5 I Operating Current (SE) CC6 I Operating Current (BE) CC7 V Input Low Voltage ...

Page 31

... Table 9. Parameter Table 9. Parameter Parameter Input Levels Timing Reference Levels 0.8V CC 0.2V CC and Table 16. Min. Typ. Max 1 and Table 16. 1,2 Min. Typ. Max 1 Min. Max 0. 0. Input and Output 0.7V CC 0.5V CC 0.3V CC AI07455 M25P80 Unit Unit Unit 31/41 ...

Page 32

... M25P80 Table 17. AC Characteristics (25MHz Operation, Device Grade Test conditions specified in Symbol Alt. Clock Frequency for the following instructions FAST_READ, PP, SE, BE, DP, RES WREN, WRDI, RDSR, WRSR f Clock Frequency for READ instructions Clock High Time t CLH Clock Low Time t CLL Clock Rise Time ...

Page 33

... Expressed as a slew-rate. 4. Only applicable as a constraint for a WRSR instruction when SRWD is set Details of how to find the date of marking are given in Application Note, AN1995. Table 9. and Table 16. Parameter 3 (peak to peak) 3 (peak to peak) C M25P80 5 Typ. Unit Min. Max. D.C. 40 MHz D.C. 20 MHz ...

Page 34

... M25P80 Figure 23. Serial Input Timing S tCHSL C tDVCH D High Impedance Q Figure 24. Write Protect Setup and Hold Timing during WRSR when SRWD=1 W tWHSL High Impedance Q 34/41 tSLCH tCHSH tCHDX tCLCH MSB IN tSHSL tSHCH tCHCL LSB IN AI01447C tSHWL AI07439 ...

Page 35

... Figure 25. Hold Timing HOLD Figure 26. Output Timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D tHLCH tCHHL tCHHH tHLQZ tCH tCLQV tQLQH tQHQL M25P80 tHHCH tHHQX AI02032 tCL tSHQZ LSB OUT AI01449D 35/41 ...

Page 36

... M25P80 PACKAGE MECHANICAL Figure 27. VDFPN8 (MLP8) 8-lead Very thin Dual Flat Package No lead, Package Outline Note: Drawing is not to scale. Table 19. VDFPN8 (MLP8) 8-lead Very thin Dual Flat Package No lead, Package Mechanical Data Symb. Typ 0.65 A3 0.20 b 0.40 D 6.00 D1 5. ...

Page 37

... M25P80 h x 45˚ inches Typ. Min. Max. 0.093 0.104 0.004 0.012 0.013 0.020 0.009 0.013 0.398 0.413 0.291 0.299 0.050 – 0.394 ...

Page 38

... M25P80 Figure 29. SO8 wide – 8 lead Plastic Small Outline, 200 mils body width, Package Outline SO-b Note: Drawing is not to scale. Table 21. SO8 wide – 8 lead Plastic Small Outline, 200 mils body width, Package Mechanical Data Symb. Typ 0. 1. 38/ Min. Max. 2.03 ...

Page 39

... The SO8 wide (200mil width) package is not a preferred option. Please ask your nearest ST sales office for availability. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Office. M25P80 – -free and TBBA-free 2 3 M25P80 39/41 ...

Page 40

... M25P80 REVISION HISTORY Table 23. Document Revision History Date Rev. Document released as a Product Preview data sheet 24-Apr-2002 1.0 Clarification of descriptions of entering Stand-by Power mode from Deep Power-down mode, and of terminating an instruction sequence or data-out sequence. VFQFPN8 package (MLP8) added. Order code (MW) corrected on page 1 for SO8 package. ...

Page 41

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