PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 197

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PIC18F45K22-I/P

Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45K22-I/P

A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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14.4.5
In Half-Bridge applications where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on, and the
other turned off), both switches may be on for a short
period of time until one switch completely turns off.
During this brief interval, a very high current (shoot-
through current) will flow through both power switches,
shorting the bridge supply. To avoid this potentially
destructive shoot-through current from flowing during
switching, turning on either of the power switches is
normally delayed to allow the other switch to
completely turn off.
In Half-Bridge mode, a digitally programmable dead-
band delay is available to avoid shoot-through current
from destroying the bridge power switches. The delay
occurs at the signal transition from the non-active state
to the active state. See
The lower seven bits of the associated PWMxCON
register
of microcontroller instruction cycles (T
FIGURE 14-17:
 2010 Microchip Technology Inc.
Standard Half-Bridge Circuit (“Push-Pull”)
(Register
PROGRAMMABLE DEAD-BAND
DELAY MODE
14-6) sets the delay period in terms
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Figure 14-16
CY
for illustration.
or 4 T
PxA
PxB
OSC
).
Preliminary
FET
Driver
FET
Driver
FIGURE 14-16:
PxA
PxB
td = Dead-Band Delay
PIC18(L)F2X/4XK22
Note 1: At this time, the TMRx register is equal to the
(2)
(2)
V+
V-
2: Output signals are shown as active-high.
(1)
td
Pulse Width
PRx register.
Load
Period
td
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
+
V
-
+
V
-
(1)
DS41412D-page 197
Period
(1)

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