PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 20

• Manufacturer Part Number: PIC18F45K22-I/P
• Description: 40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45K22-I/P

• A/d Inputs: 28-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18(L)F2X/4XK22
TABLE 1-2:
DS41412D-page 20
Legend:
Note 1:
PDIP,
SOIC
Pin Number
13
14
15
16
17
18
1
2:
UQFN
QFN,
10
11
12
13
14
15
26
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
RC2/CTPLS/P1A/CCP1/T5CKI/AN14
RC3/SCK1/SCL1/AN15
RC4/SDI1/SDA1/AN16
RC5/SDO1/AN17
RC6/P3A/CCP3/TX1/CK1/AN18
RC7/P3B/RX1/DT1/AN19
RE3/V
PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
PP
/MCLR
Pin Name
CCP3
CTPLS
P3A
T5CKI
SDO1
MCLR
CCP1
SCK1
SDA1
AN14
SCL1
AN15
AN16
AN17
AN18
AN19
SDI1
RC2
RC3
RC4
RC5
RC6
RC7
P1A
TX1
CK1
P3B
RX1
DT1
RE3
V
PP
(2)
(2)
Preliminary
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
P
I
I
I
I
I
I
I
I
I
I
I
Analog Analog input 14.
Analog Analog input 15.
Analog Analog input 16.
Analog Analog input 17.
Analog Analog input 18.
Analog Analog input 19.
CMOS
CMOS
CMOS
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
Digital I/O.
CTMU pulse generator output.
Enhanced CCP1 PWM output.
Capture 1 input/Compare 1 output/PWM 1 output.
Timer5 clock input.
Digital I/O.
Synchronous serial clock input/output for SPI mode
(MSSP2).
Synchronous serial clock input/output for I
(MSSP2).
Digital I/O.
SPI data in (MSSP1).
I
Digital I/O.
SPI data out (MSSP1).
Digital I/O.
Enhanced CCP3 PWM output.
Capture 3 input/Compare 3 output/PWM 3 output.
EUSART 1 asynchronous transmit.
EUSART 1 synchronous clock (see related RXx/DTx).
Digital I/O.
Enhanced CCP3 PWM output.
EUSART 1 asynchronous receive.
EUSART 1 synchronous data (see related TXx/CKx).
Digital input.
Programming voltage input.
Active-Low Master Clear (device Reset) input.
2
C™ data I/O (MSSP1).
Description
 2010 Microchip Technology Inc.
2
C™ mode