PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 22

• Manufacturer Part Number: PIC18F45K22-I/P
• Description: 40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45K22-I/P

• A/d Inputs: 28-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18(L)F2X/4XK22
TABLE 1-3:
DS41412D-page 22
Legend:
PDIP
Note
14
13
33
34
35
36
7
TQFP
1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX
2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,
24
31
30
10
11
Pin Number
8
9
TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;
I = Input; O = Output; P = Power.
and CCP2MX are set.
CCP3MX and CCP2MX are clear.
QFN
24
33
32
10
11
12
PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)
9
UQFN
22
29
28
10
11
8
9
RA5/C2OUT/SRNQ/SS1/HLVDIN/AN4
RA6/CLKO/OSC2
RA7/CLKI/OSC1
RB0/INT0/FLT0/SRI/AN12
RB1/INT1/C12IN3-/AN10
RB2/INT2/CTED1/AN8
RB3/CTED2/P2A/CCP2/C12IN2-/AN9
Pin Name
C12IN3-
CCP2
C12IN2-
HLVDIN
C2OUT
CTED1
CTED2
SRNQ
P2A
CLKO
OSC2
OSC1
AN12
AN10
CLKI
INT0
FLT0
INT1
INT2
RA5
SS1
AN4
RA6
RA7
RB0
RB1
RB2
AN8
RB3
AN9
SRI
(2)
(2)
Preliminary
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Analog High/Low-Voltage Detect input.
Analog Analog input 4.
Analog Analog input 12.
Analog Comparators C1 and C2 inverting input.
Analog Analog input 10.
Analog Analog input 8.
Analog Comparators C1 and C2 inverting input.
Analog Analog input 9.
Buffer
CMOS Comparator C2 output.
CMOS External clock source input. Always associated
CMOS Enhanced CCP2 PWM output.
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
Digital I/O.
SR Latch Q output.
SPI slave select input (MSSP1).
Digital I/O.
In RC mode, OSC2 pin outputs CLKOUT which
has 1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
Digital I/O.
with pin function OSC1.
Oscillator crystal input or external clock source
input ST buffer when configured in RC mode;
CMOS otherwise.
Digital I/O.
External interrupt 0.
PWM Fault input for ECCP Auto-Shutdown.
SR Latch input.
Digital I/O.
External interrupt 1.
Digital I/O.
External interrupt 2.
CTMU Edge 1 input.
Digital I/O.
CTMU Edge 2 input.
Capture 2 input/Compare 2 output/PWM 2 output.
 2010 Microchip Technology Inc.
Description