PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 323

• Manufacturer Part Number: PIC18F45K22-I/P
• Description: 40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45K22-I/P

• A/d Inputs: 28-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

19.3.2
There is a small amount of capacitance from the
internal A/D Converter sample capacitor as well as
stray capacitance from the circuit board traces and
pads that affect the precision of capacitance
measurements.
capacitance can be taken by making sure the desired
capacitance to be measured has been removed. The
measurement is then performed using the following
steps:
1.
2.
3.
4.
5.
6.
where I is known from the current source measurement
step, t is a fixed delay and V is measured by performing
an A/D conversion.
This measured value is then stored and used for
calculations of time measurement or subtracted for
capacitance measurement. For calibration, it is
expected that the capacitance of C
approximately known. C
An iterative process may need to be used to adjust the
time, t, that the circuit is charged to obtain a reasonable
voltage reading from the A/D Converter. The value of t
may be determined by setting C
value, then solving for t. For example, if C
theoretically calculated to be 11 pF, and V is expected
to be 70% of V
or 63 s.
See
capacitance calibration.
 2010 Microchip Technology Inc.
Initialize the A/D Converter and the CTMU.
Set EDG1STAT (= 1).
Wait for a fixed delay of time t.
Clear EDG1STAT.
Perform an A/D conversion.
Calculate the stray and A/D sample capacitances:
Example 19-3
C
OFFSET
CAPACITANCE CALIBRATION
(4 pF + 11 pF) • 2.31V/0.55 A
DD
, or 2.31V, then t would be:
A
=
for a typical routine for CTMU
C
measurement
STRAY
AD
is approximately 4 pF.
+
C
OFFSET
AD
=
STRAY
of

to a theoretical
I t 
 V 
the
+ C
STRAY
AD
stray
Preliminary
is
is
PIC18(L)F2X/4XK22
DS41412D-page 323