PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 365

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PIC18F45K22-I/P

Manufacturer Part Number
PIC18F45K22-I/P
Description
40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F45K22-I/P

A/d Inputs
28-Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
256 Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
3-8-bit, 4-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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24.3.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits internal and external writes to data
EEPROM. The CPU can always read data EEPROM
under normal operation, regardless of the protection bit
settings.
24.3.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In normal execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP or
an external programmer.
24.4
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions
or during program/verify. The ID locations can be read
when the device is code-protected.
24.5
PIC18(L)F2X/4XK22
programmed while in the end application circuit. This is
simply done with two lines for clock and data and three
other lines for power, ground and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom
firmware to be programmed.
24.6
When the DEBUG Configuration bit is programmed to
a ‘0’, the In-Circuit Debugger functionality is enabled.
This function allows simple debugging functions when
used with MPLAB
this feature enabled, some resources are not available
for general use.
required by the background debugger.
TABLE 24-6:
 2010 Microchip Technology Inc.
I/O pins:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
Table 24-6
®
DEBUGGER RESOURCES
IDE. When the microcontroller has
devices
shows which resources are
RB6, RB7
can
be
serially
Preliminary
To use the In-Circuit Debugger function of the
microcontroller, the design must implement In-Circuit
Serial Programming connections to the following pins:
• MCLR/V
• V
• V
• RB7
• RB6
This will interface to the In-Circuit Debugger module
available from Microchip or one of the third party
development tool companies.
24.7
The LVP Configuration bit enables Single-Supply ICSP
Programming (formerly known as Low-Voltage ICSP
Programming or LVP). When Single-Supply Program-
ming is enabled, the microcontroller can be programmed
without requiring high voltage being applied to the
MCLR/V
Flash Memory Programming” (DS41398) for more
details about low voltage programming.
The LVP bit may be set or cleared only when using
standard high-voltage programming (V
the MCLR/V
only the standard high-voltage programming is
available and must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required.
Note 1: High-voltage programming is always
PIC18(L)F2X/4XK22
DD
SS
PP
2: By
3: While in Low-Voltage ICSP mode, MCLR
Single-Supply ICSP Programming
PP
/RE3 pin. See “PIC18(L)F2XK22/4XK22
PP
available, regardless of the state of the
LVP bit, by applying V
pin.
enabled in unprogrammed devices (as
supplied from Microchip) and erased
devices.
is always enabled, regardless of the
MCLRE bit, and the RE3 pin can no
longer be used as a general purpose
input.
/RE3
/RE3 pin). Once LVP has been disabled,
DD
default,
. If code-protected memory is to be
Single-Supply
DS41412D-page 365
IHH
IHH
to the MCLR
ICSP
applied to
is

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