PIC18F45K22-I/P Microchip Technology Inc., PIC18F45K22-I/P Datasheet - Page 56

• Manufacturer Part Number: PIC18F45K22-I/P
• Description: 40 PDIP .600in TUBE, 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F45K22-I/P

• A/d Inputs: 28-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18(L)F2X/4XK22
3.6
Idle mode allows users to substantially reduce power
consumption by stopping the CPU clock. Even so,
peripheral modules still remain clocked, and thus, con-
sume power. There may be cases where the applica-
tion needs what IDLE mode does not provide: the
allocation of power resources to the CPU processing
with minimal power consumption from the peripherals.
PIC18(L)F2X/4XK22 family devices address this
requirement by allowing peripheral modules to be
selectively disabled, reducing or eliminating their
power consumption. This can be done with control bits
in the Peripheral Module Disable (PMD) registers.
These bits generically named XXXMD are located in
control registers PMD0, PMD1 or PMD2.
REGISTER 3-1:
DS41412D-page 56
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
UART2MD
R/W-0
Selective Peripheral Module
Control
UART2MD: UART2 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
UART1MD: UART1 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
TMR6MD: Timer6 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
TMR5MD: Timer5 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
TMR4MD: Timer4 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
TMR3MD: Timer3 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
TMR2MD: Timer2 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
TMR1MD: Timer1 Peripheral Module Disable Control bit
1 = Module is disabled, Clock Source is disconnected, module does not draw digital power
0 = Module is enabled, Clock Source is connected, module draws digital power
UART1MD
R/W-0
PMD0: PERIPHERAL MODULE DISABLE REGISTER 0
W = Writable bit
‘1’ = Bit is set
TMR6MD
R/W-0
TMR5MD
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TMR4MD
R/W-0
Setting the PMD bit for a module disables all clock
sources
consumption to an absolute minimum. In this state, the
control and STATUS registers associated with the
peripheral are also disabled, so writes to these
registers have no effect and read values are invalid.
to
TMR3MD
R/W-0
that
module,
 2010 Microchip Technology Inc.
x = Bit is unknown
TMR2MD
R/W-0
reducing
TMR1MD
its
R/W-0
power
bit 0