PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet

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PIC16F716-I/P

Manufacturer Part Number
PIC16F716-I/P
Description
18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F716-I/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F716
Data Sheet
8-bit Flash-based Microcontroller
with A/D Converter and
Enhanced Capture/Compare/PWM
Preliminary
 2003 Microchip Technology Inc.
DS41206A

Related parts for PIC16F716-I/P

PIC16F716-I/P Summary of contents

Page 1

... Flash-based Microcontroller Enhanced Capture/Compare/PWM  2003 Microchip Technology Inc. PIC16F716 Data Sheet with A/D Converter and Preliminary DS41206A ...

Page 2

... QS-9000 compliant for its PICmicro ® 8-bit MCUs devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. Preliminary  2003 Microchip Technology Inc. ® code hopping ...

Page 3

... Extended: - 125 C Memory Device Flash Data PIC16F716 2048 x 14 128 x 8  2003 Microchip Technology Inc. PIC16F716 Low-Power Features: • Standby Current: - 100 nA @ 2.0V, typical • Operating Current kHz, 2.0V, typical - 120 MHz, 2.0V, typical • Watchdog Timer Circuit 2.0V, typical • ...

Page 4

... PIC16F716 Pin Diagrams 18-pin PDIP, SOIC RA2/AN2 1 18 RA3/AN3 REF RA4/T0CKI 3 16 MCLR RB0/INT/ECCPAS2 6 13 RB1/T1OSO/T1CKI RB2/T1OSI 10 RB3/CCP1/P1A 9 20-pin SSOP RA2/AN2 1 20 RA3/AN3 REF RA4/T0CKI 3 18 MCLR RB0/INT/ECCPAS2 RB1/T1OSO/T1CKI RB2/T1OSI 11 RB3/CCP1/P1A 10 DS41206A-page 2 RA1/AN1 RA0/AN0 OSC1/CLKIN OSC2/CLKOUT V DD RB7/P1D RB6/P1C RB5/P1B RB4/ECCPAS0 ...

Page 5

... When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include liter- ature number) you are using. Customer Notification System Register on our web site at www.microchip.com/cn to receive the most current information on all of our products.  2003 Microchip Technology Inc. Preliminary PIC16F716 DS41206A-page 3 ...

Page 6

... PIC16F716 NOTES: DS41206A-page 4 Preliminary  2003 Microchip Technology Inc. ...

Page 7

... Figure 1-1 is the block diagram for the PIC16F716 device. The pinouts are listed in Table 1-1. FIGURE 1-1: PIC16F716 BLOCK DIAGRAM 13 Flash Program ...

Page 8

... PIC16F716 TABLE 1-1: PIC16F716 PINOUT DESCRIPTION Name Function Input Type Output Type MCLR/V MCLR OSC1/CLKIN OSC1 CLKIN CLKIN OSC2/CLKOUT OSC2 CLKOUT RA0/AN0 RA0 AN0 RA1/AN1 RA1 AN1 RA2/AN2 RA2 AN2 RA3/AN3/V RA3 REF AN3 V REF RA4/T0CKI RA4 T0CKI RB0/INT/ECCPAS2 RB0 INT ...

Page 9

... Program Memory Organization The PIC16F716 has a 13-bit program counter capable of addressing program memory space. The PIC16F716 has words of program memory. Accessing a location above the physically implemented address will cause a wrap-around. The Reset vector is at 0000h and the interrupt vector is at 0004h. ...

Page 10

... PIC16F716 2.2.1 GENERAL PURPOSE REGISTER FILE The register file can be accessed either directly or indirectly through the File Select Register FSR (Section 2.5 “Indirect Addressing, INDF and FSR Registers”). DS41206A-page 8 FIGURE 2-2: REGISTER FILE MAP File Address (1) 00h INDF 01h TMR0 ...

Page 11

... The IRP and RP1 bits are reserved. Always maintain these bits clear any device Reset, these pins are configured as inputs. 6: This is the value that will be in the port output latch. 7: Reserved bits, do not use. 8: ECCPAS1 bit is not used on PIC16F716.  2003 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 RP0 TO ...

Page 12

... PIC16F716 TABLE 2-2: SPECIAL FUNCTION REGISTER SUMMARY BANK 1 Address Name Bit 7 Bit 6 (1) 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 81h OPTION_REG RBPU INTEDG (1) 82h PCL Program Counter's (PC) Least Significant Byte (1) (4) (4) 83h STATUS ...

Page 13

... bits from the Status register. For other instructions, not affecting any Status bits, see the “Instruction Set Summary.” Note 1: The PIC16F716 does not use bits IRP and RP1 (STATUS<7:6>). Maintain these bits clear to ensure upward compatibility with future products. ...

Page 14

... PIC16F716 2.2.2.2 OPTION_REG Register The OPTION_REG register is a readable and writable register, which contains various control bits to configure the TMR0 prescaler/WDT postscaler assignable register known also as the prescaler), the External INT Interrupt, TMR0 and the weak pull-ups on PORTB. REGISTER 2-2: OPTION_REG REGISTER (ADDRESS: 81h) ...

Page 15

... R/W-0 R/W-0 R/W-0 T0IE INTE RBIE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary PIC16F716 R/W-0 R/W-0 R/W-x T0IF INTF RBIF bit Bit is unknown DS41206A-page 13 ...

Page 16

... PIC16F716 2.2.2.4 PIE1 Register This register contains the individual enable bits for the peripheral interrupts. REGISTER 2-4: PIE1 REGISTER (ADDRESS: 8Ch) U-0 R/W-0 — ADIE bit 7 bit 7 Unimplemented: Read as ‘0’ bit 6 ADIE: A/D Converter Interrupt Enable bit 1 = Enables the A/D interrupt ...

Page 17

... U-0 U-0 U-0 R/W-0 — — — CCP1IF W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary PIC16F716 R/W-0 R/W-0 TMR2IF TMR1IF bit Bit is unknown DS41206A-page 15 ...

Page 18

... PIC16F716 2.2.2.6 PCON Register The Power Control (PCON) register contains a flag bit to allow differentiation between a Power-on Reset (POR external MCLR Reset or WDT Reset. These devices contain an additional bit to differentiate a Brown-out Reset condition from a Power-on Reset condition. REGISTER 2-6: PCON REGISTER (ADDRESS: 8Eh) U-0 — ...

Page 19

... PCLATH is not modified when the stack is PUSHed or POPed. After the stack has been PUSHed 8 times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on). Preliminary PIC16F716 LOADING DIFFERENT SITUATIONS PCL 0 Instruction with PCL as ...

Page 20

... DS41206A-page 18 EXAMPLE 2-2: MOVLW MOVWF NEXT CLRF INCF BTFSS GOTO CONTINUE : An effective 9-bit address is obtained by concatenating the 8-bit FSR register and the IRP bit (STATUS<7>), as shown in Figure 2-4. However, IRP is not used in the PIC16F716. 0 IRP (2) bank select 80h 100h 180h (3) (3) ...

Page 21

... MOVWF TRISA ;Set RA<3:0> as inputs ;RA<4> as outputs BCF STATUS, RP0 ;Return to Bank 0 FIGURE 3-1: BLOCK DIAGRAM OF RA3:RA0 DATA BUS PORT Q Data Latch TRIS CK Q TRIS Latch RD TRIS RD PORT To A/D Converter Preliminary PIC16F716 I/O pin Analog Input mode TTL Input Buffer DS41206A-page 19 ...

Page 22

... PIC16F716 FIGURE 3-2: BLOCK DIAGRAM OF RA4/T0CKI PIN Data Latch DATA Q D BUS PORT N TRIS Latch Schmitt TRIS CK Q Trigger Input Buffer RD TRIS PORT TMR0 Clock Input TABLE 3-1: PORTA FUNCTIONS Name Bit# Buffer RA0/AN0 bit 0 TTL RA1/AN1 bit 1 TTL RA2/AN2 bit 2 ...

Page 23

... RBIF to be cleared. The interrupt-on-change feature is recommended for V DD wake-up on key depression operation and operations where PORTB is only used for the interrupt-on-change feature. Polling of PORTB is not recommended while using the interrupt-on-change feature. RB0/ INT/ ECCPAS2 V SS Preliminary PIC16F716 DS41206A-page 21 ...

Page 24

... PIC16F716 FIGURE 3-4: BLOCK DIAGRAM OF RB1/T1OSO/T1CKI PIN Data Latch DATA BUS PORTB CK Q TRIS Latch TRISB TRISB T1OSCEN RD PORTB T1OSI (From RB2) To Timer1 clock input Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). ...

Page 25

... Schmitt Trigger Buffer V DD weak P pull-up Data Latch TRIS Latch D Q TTL CK Buffer ST Buffer RD TRIS Latch PORT PORT EN Q3 Preliminary PIC16F716 V DD RB3/CCP1/P1A RB4/ECCPAS0 V SS Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). DS41206A-page 23 ...

Page 26

... PIC16F716 FIGURE 3-8: BLOCK DIAGRAM OF RB5/P1B PIN PWMB(P1B) Enable PWMB(P1B) Data out PWMB(P1B) Auto-shutdown tri-state Data Latch DATA BUS PORTB CK TRIS Latch TRISB TRISB RD PORTB Set RBIF From other RB7:RB4 pins Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). ...

Page 27

... Input/output pin (with interrupt-on-change). Internal software programmable weak pull-up. PWM B output. Input/output pin (with interrupt-on-change). Internal software programmable weak pull-up. PWM C output. Serial programming clock. Input/output pin (with interrupt-on-change). Internal software programmable weak pull-up. PWM D output. Serial programming data. Preliminary PIC16F716 V DD weak ...

Page 28

... PIC16F716 TABLE 3-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB Address Name Bit 7 Bit 6 06h PORTB RB7 RB6 86h TRISB PORTB Data Direction Register 81h OPTION_REG RBPU INTEDG Legend unknown unchanged. Shaded cells are not used by PORTB. DS41206A-page 26 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 ...

Page 29

... To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. PS OUT 1 Sync with Internal clock Programmable 0 (2) Prescaler (2 cycle delay) 3 (1) (1) PSA PS2, PS1, PS0 Preliminary PIC16F716 Data Bus 8 TMR0 PS OUT Set interrupt flag bit T0IF on overflow DS41206A-page 27 ...

Page 30

... PIC16F716 4.2.1 SWITCHING PRESCALER ASSIGNMENT The prescaler assignment is fully under software control (i.e., it can be changed “on-the-fly” during program execution). Note: To avoid an unintended device Reset, a specific instruction sequence (shown in ® the PICmicro Mid-Range Reference Manual, DS33023) must be executed when changing the prescaler assignment from Timer0 to the WDT ...

Page 31

... Capture/Compare/PWM (ECCP) Module”). R/W-0 R/W-0 R/W-0 T1CKPS1 T1CKPS0 T1OSCEN (1) /4) OSC W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary PIC16F716 R/W-0 R/W-0 R/W-0 T1SYNC TMR1CS TMR1ON bit Bit is unknown DS41206A-page 29 ...

Page 32

... PIC16F716 FIGURE 5-1: TIMER1 BLOCK DIAGRAM Set flag bit TMR1IF on Overflow TMR1 TMR1H T1OSC RB1/T1OSO/T1CKI RB2/T1OSI Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. 5.2 Timer1 Oscillator A crystal oscillator circuit is built in between pins T1OSI (input) and T1OSO (amplifier output enabled by setting control bit T1OSCEN (T1CON< ...

Page 33

... Additional information on timer modules is available in ® the PICmicro Mid-Range (DS33023). R/W-0 R/W-0 R/W-0 TOUTPS0 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary PIC16F716 Reference Manual, R/W-0 R/W-0 R/W-0 TMR2ON T2CKPS1 T2CKPS0 bit Bit is unknown DS41206A-page 31 ...

Page 34

... PIC16F716 6.1 Timer2 Operation Timer2 can be used as the PWM time base for PWM mode of the ECCP module. The TMR2 register is readable and writable, and is cleared on any device Reset The input clock (F /4) has a prescale option of 1:1, OSC 1:4 or 1:16, selected by T2CKPS1:T2CKPS0 (T2CON<1:0>). ...

Page 35

... R/W-0 R/W-0 R/W-0 DC1B1 DC1B0 CCP1M3 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary PIC16F716 ® Mid-Range Reference Manual, ECCP MODE - TIMER RESOURCE Timer Resource Timer1 Timer1 Timer2 R/W-0 R/W-0 R/W-0 CCP1M2 ...

Page 36

... PIC16F716 7.1 Capture Mode In Capture mode, CCPR1H:CCPR1L captures the 16-bit value of the TMR1 register when an event occurs on pin RB3/CCP1/P1A. An event is defined as: • Every falling edge • Every rising edge • Every 4th rising edge • Every 16th rising edge An event is selected by control bits CCP1M3:CCP1M0 (CCP1CON< ...

Page 37

... T0IF — — — CCP1IF T1CKPS0 T1OSCEN T1SYNC DC1B1 DC1B0 CCP1M3 CCP1M2 — — — CCP1IE Preliminary PIC16F716 COMPARE MODE OPERATION BLOCK DIAGRAM Special Event Trigger Set flag bit CCP1IF (PIR1<2>) CCPR1H CCPR1L Q S Output Comparator Logic match R TMR1H TMR1L CCP1CON<3:0> ...

Page 38

... PIC16F716 7.3 PWM Mode In Pulse Width Modulation (PWM) mode, the CCP1 pin produces 10-bit resolution PWM output. Since the CCP1 pin is multiplexed with the PORTB data latch, the TRISB<3> bit must be cleared to make the CCP1 pin an output. Note: Clearing the CCP1CON register will force the CCP1 PWM output latch to the default low level ...

Page 39

... Bit 5 Bit 4 Bit 3 Bit 2 T0IE INTE RBIE T0IF — — — CCP1IF DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 — — — CCP1IE Preliminary PIC16F716 ( F ) OSC log F PWM bits = log(2) ® Mid-Range Reference 0x3F 0x1F 0x17 8 7 6.6 Value on Value on Bit 1 Bit 0 ...

Page 40

... PIC16F716 7.4 ENHANCED PWM MODE The Enhanced PWM mode provides additional PWM output options for a broader range of control applications. The module is an upwardly compatible version of the standard CCP module and offers up to four outputs, designated P1A through P1D. Users are also able to select the polarity of the signal (either active-high or active-low). The module’ ...

Page 41

... OSC • Delay = (PWM1CON<6:0>) OSC Note 1: Dead-band delay is programmed using the PWM1CON register (Section 7.4.4 “Programmable Dead-Band Delay”).  2003 Microchip Technology Inc. 0 Duty Cycle Period (1) (1) Delay Delay 0 Duty Cycle Period (1) (1) Delay Delay Preliminary PIC16F716 PR2+1 PR2+1 DS41206A-page 39 ...

Page 42

... PIC16F716 FIGURE 7-8: PWM OUTPUT RELATIONSHIPS (P1A, P1C ACTIVE-HIGH. P1B, P1D ACTIVE-LOW) SIGNAL CCP1CON <7:6> P1A Modulated (Single Output) 00 P1A Modulated (Half-Bridge) P1B Modulated 10 P1A Active P1B Inactive (Full-Bridge, 01 Forward) P1C Inactive P1D Modulated P1A Inactive P1B Modulated (Full-Bridge, 11 Reverse) P1C Active ...

Page 43

... Duty Cycle = T * (CCPR1L<7:0> : CCP1CON<5:4>) * (TMR2 prescale value) OSC • Delay = (PWM1CON<6:0>) OSC Note 1: Dead-band delay is programmed using the PWM1CON register (Section 7.4.4 “Programmable Dead-Band Delay”).  2003 Microchip Technology Inc. 0 Duty Cycle Period (1) (1) Delay Delay Preliminary PIC16F716 PR2+1 DS41206A-page 41 ...

Page 44

... FIGURE 7-11: EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS Standard Half-Bridge Circuit (“Push-Pull”) PIC16F716 Half-Bridge Output Driving a Full-Bridge Circuit PIC16F716 P1A P1B DS41206A-page 42 Since the P1A and P1B outputs are multiplexed with the PORTB<3> and PORTB<5> data latches, the TRISB<3> and TRISB<5> bits must be cleared to configure P1A and P1B as outputs ...

Page 45

... The direction of the PWM output changes when the duty cycle of the output near 100%. 2. The turn off time of the power switch, including the power device and driver circuit, is greater than the turn on time. Preliminary PIC16F716 QC FET Driver FET Driver QD DS41206A-page 43 ...

Page 46

... PIC16F716 Figure 7-14 shows an example where the PWM direction changes from forward to reverse near 100% duty cycle. At time t1, the output P1A and P1D become inactive, while output P1C becomes active. In this example, since the turn-off time of the power devices is longer than the turn-on time, a shoot-through current may flow through power devices QC and QD (see Figure 7-12) for the duration of ‘ ...

Page 47

... PWM outputs remain in their shutdown state for that entire PWM period. When the ECCPASE bit is cleared, the PWM outputs will return to normal operation at the beginning of the next PWM period. Note: Writing to the ECCPASE bit is disabled while a shutdown condition is active. Preliminary PIC16F716 for auto-shutdown. Auto-shutdown by the PSSAC1:PSSAC0 and ...

Page 48

... PIC16F716 REGISTER 7-2: PWM1CON: PWM CONFIGURATION REGISTER (ADDRESS: 18h) R/W-0 R/W-0 PRSEN PDC6 bit 7 bit 7 PRSEN: PWM Restart Enable bit 1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes away; the PWM restarts automatically Upon auto-shutdown, ECCPASE must be cleared in firmware to restart the PWM. ...

Page 49

... TMR2IF bit being set as the second PWM period begins. PWM Period Normal PWM Shutdown Shutdown Event Occurs Event Clears PWM Period Normal PWM Shutdown Shutdown Event Occurs Event Clears Preliminary PIC16F716 outputs. Changing the polarity PWM Resumes ECCPASE Cleared by Firmware PWM Resumes DS41206A-page 47 ...

Page 50

... PIC16F716 7.4.7 SETUP FOR PWM OPERATION The following steps should be taken when configuring the ECCP module for PWM operation: 1. Configure the PWM pins P1A and P1B (and P1C and P1D, if used) as inputs by setting the corresponding TRISB bits. 2. Set the PWM period by loading the PR2 register. ...

Page 51

... I/O. R/W-0 R/W-0 R/W-0 CHS2 CHS1 CHS0 GO/DONE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary PIC16F716 Reference Manual, R/W-0 R/W-0 R/W-0 — ADON bit Bit is unknown DS41206A-page 49 ...

Page 52

... PIC16F716 REGISTER 8-2: ADCON1 REGISTER (ADDRESS: 9Fh) U-0 — bit 7 bit 7-3 Unimplemented: Read as '0' bit 2-0 PCFG2:PCFG0: A/D Port Configuration Control bits Legend Readable bit -n = Value at POR The ADRES register contains the result of the A/D conversion. When the A/D conversion is complete, the result is loaded into the ADRES register, the GO/DONE bit (ADCON0< ...

Page 53

... When the conversion is started, the holding capacitor is disconnected from the ) SS input pin. ). The DD for analog V DD Sampling Switch leakage V = 0.6V T ± 500 various junctions Preliminary PIC16F716 011 RA3/AN3/V REF 010 RA2/AN2 001 RA1/AN1 000 RA0/AN0 , see ACQ ® Mid-Range Reference Manual HOLD = DAC capacitance = 51 ...

Page 54

... PIC16F716 8.2 Selecting the A/D Conversion Clock The A/D conversion time per bit is defined as T A/D conversion requires 9.5 T per 8-bit conversion. AD The source of the A/D conversion clock is software selectable. The four possible options for T • OSC • OSC • OSC • ...

Page 55

... CHS0 GO/DONE — (1) — PORTA Data Direction Register — — — CCP1IE TMR2IE — — — PCFG2 PCFG1 Preliminary PIC16F716 Value on Value on all Bit 0 POR, other Resets BOR RA0 --xx 0000 --uu uuuu RBIF 0000 000x 0000 000u TMR1IF -0-- -000 -0-- -000 xxxx xxxx ...

Page 56

... PIC16F716 NOTES: DS41206A-page 54 Preliminary  2003 Microchip Technology Inc. ...

Page 57

... SPECIAL FEATURES OF THE CPU The PIC16F716 device has a host of features intended to maximize system reliability, minimize cost through elimination of external components, provide power saving operating modes and offer code protection. These are: • OSC Selection • Reset - Power-on Reset (POR) - Power-up Timer (PWRT) ...

Page 58

... PIC16F716 REGISTER 9-1: CONFIGURATION WORD CP — — — — bit 13 bit 13 CP: Flash Program Memory Code Protection bit 1 = Code protection off 0 = All program memory code protected bit 12-8 Unimplemented: Read as ‘1’ bit 7 BORV: Brown-out Reset Voltage bit 1 = VBOR set to 4. VBOR set to 2 ...

Page 59

... Oscillator Configurations 9.2.1 OSCILLATOR TYPES The PIC16F716 can be operated in four different oscillator modes. The user can program two configuration bits (FOSC1 and FOSC0) to select one of these four modes: • Low-power Crystal • Crystal/Resonator • High-speed Crystal/Resonator • Resistor/Capacitor 9.2.2 CRYSTAL OSCILLATOR/CERAMIC ...

Page 60

... C values. The user also needs to EXT take into account variation due to tolerance of external R and C components used. Figure 9-3 shows how the R/C combination is connected to the PIC16F716. FIGURE 9-3: RC OSCILLATOR MODE EXT ...

Page 61

... Sleep.  2003 Microchip Technology Inc. 9.7 Programmable Brown-Out Reset (PBOR) The PIC16F716 has on-chip Brown-out Reset circuitry. A configuration bit, BOREN, can disable (if clear/pro- grammed) or enable (if set) the Brown-out Reset circuitry. The BORV configuration bit selects the programmable Brown-out Reset threshold voltage (V BORV ...

Page 62

... PIC16F716 FIGURE 9-5: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT External Reset MCLR Sleep WDT WDT Module Time-out Reset V rise DD detect Power-on Reset V DD Brown-out Reset BOREN OST/PWRT OST 10-bit Ripple counter OSC1 (1) PWRT On-chip 10-bit Ripple counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN ...

Page 63

... Microchip Technology’s MCP809 microcontroller supervisor. The MCP8XX and MCP1XX families of supervisors provide push-pull and open collector outputs with both high and low active Reset pins. There are 7 different trip point selections to accommodate 5V and 3V systems. DD Preliminary PIC16F716 EXTERNAL BROWN-OUT PROTECTION CIRCUIT MCLR PIC16F716 DS41206A-page 61 ...

Page 64

... Then bringing MCLR high will begin execution immediately (Figure 9-12). This is useful for testing purposes or to synchronize more than one PIC16F716 device operating in parallel. Table 9-5 shows the Reset conditions for some special function registers, while Table 9-6 shows the Reset conditions for all the registers ...

Page 65

... Microchip Technology Inc. Program Status Counter Register 000h 0001 1xxx 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 0001 1uuu ( uuu1 0uuu Preliminary PIC16F716 PCON Register ---- --0x ---- --01 ---- --uu ---- --uu ---- --uu ---- --uu ---- --u0 ---- --uu DS41206A-page 63 ...

Page 66

... PIC16F716 TABLE 9-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS OF THE PIC16F716 Power-on Reset, Register Brown-out Reset W xxxx xxxx INDF N/A TMR0 xxxx xxxx PCL 0000h STATUS 0001 1xxx FSR xxxx xxxx (4), (5), (6) PORTA --xx 0000 (4), (5) PORTB xxxx xxxx PCLATH ---0 0000 INTCON 0000 -00x ...

Page 67

... INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-12: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET  2003 Microchip Technology Inc. T PWRT T OST T PWRT T OST T PWRT T OST Preliminary PIC16F716 ) DD ): CASE CASE 2 DD DS41206A-page 65 ...

Page 68

... PIC16F716 9.10 Interrupts The PIC16F716 devices have sources of interrupt. The Interrupt Control Register (INTCON) records individual interrupt requests in flag bits. It also has individual and global interrupt enable bits. Note: Individual interrupt flag bits are set regard- less of the status of their corresponding mask bit or the GIE bit. A Global Interrupt Enable bit, GIE (INTCON< ...

Page 69

... FSR to W ;Copy FSR from W to FSR_TEMP ;Restore FSR ;Move W into FSR ;Restore PCLATH ;Move W into PCLATH ;Swap STATUS_TEMP register into W ;Move W into STATUS register ;Swap W_TEMP ;Swap W_TEMP into W ;Return from interrupt and enable GIE Preliminary PIC16F716 PCLATH_TEMP and DS41206A-page 67 ...

Page 70

... PIC16F716 9.12 Watchdog Timer (WDT) The Watchdog Timer is a free running, on-chip, RC oscillator which does not require any external components. This RC oscillator is separate from the RC oscillator of the OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the OSC1/CLKIN ...

Page 71

... SLEEP instruction, it may be possible for flag bits to become set before the SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruction should be executed before a SLEEP instruction. Preliminary PIC16F716 DS41206A-page 69 ...

Page 72

... Inst( Inst( Dummy cycle 9.16 In-Circuit Serial Programming™ PIC16F716 microcontrollers programmed while in the end application circuit. This is simply done with two lines for clock and data, and three other lines for power, ground and the programming voltage. This allows customers to manufacture boards with unprogrammed devices and then program the microcontroller just before shipping the product ...

Page 73

... INSTRUCTION SET SUMMARY Each PIC16F716 instruction is a 14-bit word divided into an opcode which specifies the instruction type and one or more operands which further specify the operation of the instruction. The PIC16F716 instruction set summary in Table 10-2 lists byte-oriented, bit- oriented, and ...

Page 74

... PIC16F716 TABLE 10-2: PIC16F716 INSTRUCTION SET Mnemonic, Description Operands BYTE-ORIENTED FILE REGISTER OPERATIONS ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW — Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ ...

Page 75

... Cycles: Example ANDWF Syntax: f,d Operands: Operation: Status Affected: Encoding: dfff ffff Description: Words: Cycles: Example Preliminary PIC16F716 AND Literal with W [ label ] ANDLW 255 (W) .AND. (k) ( 1001 kkkk kkkk The contents of W register are AND’ed with the eight bit literal ‘k’. The result is placed in the W register ...

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... PIC16F716 BCF Bit Clear f Syntax: [ label ] BCF f,b Operands 127 Operation: 0 (f<b>) Status Affected: None Encoding: 01 00bb Description: Bit ‘b’ in register ‘f’ is cleared. Words: 1 Cycles: 1 Example BCF REG1, 7 Before Instruction REG1 = 0xC7 After Instruction REG1 = 0x47 BSF Bit Set f ...

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... Encoding: Description: Words: Cycles: REG1 PROCESS_CODE Example CLRF Syntax: Operands: Operation: Status Affected: Encoding: Description: Words: Cycles: Example Preliminary PIC16F716 Call Subroutine [ label ] CALL 2047 (PC)+ 1 TOS, k PC<10:0>, (PCLATH<4:3>) PC<12:11> None 10 0kkk kkkk kkkk Call Subroutine. First, return address (PC+1) is pushed onto the stack ...

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... PIC16F716 CLRW Clear W Syntax: [ label ] CLRW Operands: None Operation: 00h ( Status Affected: Z Encoding: 00 0001 Description: W register is cleared. Zero bit (Z) is set. Words: 1 Cycles: 1 Example CLRW Before Instruction W = 0x5A After Instruction W = 0x00 CLRWDT Clear Watchdog Timer Syntax: [ label ] CLRWDT Operands: None Operation: ...

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... Microchip Technology Inc. GOTO Syntax: Operands: Operation: skip if result = Status Affected: Encoding: dfff ffff Description: Words: Cycles: Example REG1, 1 LOOP HERE Preliminary PIC16F716 Unconditional Branch [ label ] GOTO 2047 k PC<10:0> PCLATH<4:3> PC<12:11> None 10 1kkk kkkk kkkk GOTO is an unconditional branch. The eleven-bit immediate value is loaded into PC bits < ...

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... PIC16F716 INCF Increment f Syntax: [ label ] INCF f,d Operands 127 d [0,1] Operation: ( (dest) Status Affected: Z Encoding: 00 1010 Description: The contents of register ‘f’ are incremented. If ‘d’ the result is placed in the W register. If ‘d’ the result is placed back in register ‘f’. Words: ...

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... Cycles: Example MOVF f,d Syntax: Operands: Operation: Status Affected: dfff ffff Encoding: Description: Words: Cycles: Example Preliminary PIC16F716 Move Literal label ] MOVLW 255 k (W) None 11 00xx kkkk kkkk The eight bit literal ‘k’ is loaded into W register. The don’t cares will assemble as ‘ ...

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... PIC16F716 MOVWF Move Syntax: [ label ] MOVWF Operands 127 Operation: (W) (f) Status Affected: None Encoding: 00 0000 Description: Move data from W register to register ‘f’. Words: 1 Cycles: 1 Example MOVWF REG1 Before Instruction REG1 = 0xFF W = 0x4F After Instruction REG1 = 0x4F W = 0x4F NOP No Operation Syntax: ...

Page 83

... Microchip Technology Inc. RLF Syntax: Operands: Operation: Status Affected: Encoding: kkkk kkkk Description: Words: Cycles: Example 0000 1000 Preliminary PIC16F716 Rotate Left f through Carry [ label ] RLF f 127 d [0,1] See description below C 00 1101 dfff ffff The contents of register ‘f’ are rotated one bit to the left through the Carry Flag. If ‘ ...

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... PIC16F716 RRF Rotate Right f through Carry Syntax: [ label ] RRF f,d Operands 127 d [0,1] Operation: See description below Status Affected: C Encoding: 00 1100 Description: The contents of register ‘f’ are rotated one bit to the right through the Carry Flag. If ‘d’ the result is placed in the W register. If ‘ ...

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... Status Affected: Encoding: dfff ffff Description: Words: Cycles: Example TRIS Syntax: Operands: Operation: Status Affected: Encoding: Description: Words: Cycles: Example Preliminary PIC16F716 Swap Nibbles label ] SWAPF f 127 d [0,1] (f<3:0>) (dest<7:4>), (f<7:4>) (dest<3:0>) None 00 1110 dfff ffff The upper and lower nibbles of register ‘ ...

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... PIC16F716 XORLW Exclusive OR Literal with W Syntax: [ label ] XORLW k Operands 255 Operation: (W) .XOR. k Status Affected: Z Encoding: 11 1010 Description: The contents of the W register are XOR’ed with the eight bit literal ‘k’. The result is placed in the W register. Words: 1 Cycles: 1 Example: XORLW 0xAF ...

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... The MPASM assembler features include: • Integration into MPLAB IDE projects • User defined macros to streamline assembly code • Conditional assembly for multi-purpose source files • Directives that allow complete control over the assembly process Preliminary PIC16F716 ® ® standard hex DS41206A-page 85 ...

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... PIC16F716 11.3 MPLAB C17 and MPLAB C18 C Compilers The MPLAB C17 and MPLAB C18 Code Development Systems are complete ANSI C compilers for Microchip’s PIC17CXXX and PIC18CXXX family of microcontrollers. These compilers provide powerful integration capabilities, superior code optimization and ease of use not found with other compilers. ...

Page 89

... The PICSTART Plus development programmer supports most PICmicro devices pins. Larger pin count devices, such as the PIC16C92X and PIC17C76X, may be supported with an adapter socket. The PICSTART Plus development programmer is CE compliant. Preliminary PIC16F716 TM (ICSP TM ) DS41206A-page 87 ...

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... PIC16F716 11.14 PICDEM 1 PICmicro Demonstration Board The PICDEM 1 demonstration board demonstrates the capabilities of the PIC16C5X PIC16C58A), PIC16C61, PIC16C62X, PIC16C71, PIC16C8X, PIC17C42, PIC17C43 and PIC17C44. All necessary hardware and software is included to run basic demo programs. The sample microcontrollers provided with the PICDEM 1 demonstration board can be programmed with a PRO MATE II device program- mer PICSTART Plus development programmer ...

Page 91

... PICDEM MSC demo boards for Switching mode power supply, high power IR driver, delta sigma ADC, and flow rate sensor Check the Microchip web page and the latest Product Line Card for the complete list of demonstration and ® IDE (Inte- evaluation kits. ® Preliminary PIC16F716 TM development DS41206A-page 89 ...

Page 92

... PIC16F716 NOTES: DS41206A-page 90 Preliminary  2003 Microchip Technology Inc. ...

Page 93

... Exposure to maximum rating conditions for extended periods may affect device reliability.  2003 Microchip Technology Inc. (except V , MCLR, and RA4) ....................................... -0. (Note 2) ...................................................................................... 0V to +13.25V ) DD > ∑ pin, inducing currents greater than 80 mA, may cause latch-up Preliminary PIC16F716 +0.3V ∑ {( ∑( pin rather PP DS41206A-page 91 ) ...

Page 94

... V DD (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16F716 VOLTAGE-FREQUENCY GRAPH, 85°C < TA < +125°C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. ...

Page 95

... DC Characteristics: PIC16F716 (Industrial, Extended) DC CHARACTERISTICS Param Sym Characteristic No. V Supply Voltage DD D001 D001A D002* V RAM Data Retention DR (1) Voltage D003 V V Start Voltage to ensure POR DD internal Power-on Reset signal D004 Rise Rate to ensure VDD DD D004A* internal Power-on Reset signal V Brown-out Reset voltage trip ...

Page 96

... PIC16F716 12.2 DC Characteristics: PIC16F716 (Industrial) DC CHARACTERISTICS Para Sym Characteristic m No. V Supply Voltage DD D001 I Power-down Base Current PD D020 I Peripheral Module Current MOD D021 D022 D025 I Supply Current DD D010 D011 D012 D013 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested ...

Page 97

... DC Characteristics: PIC16F716 (Extended) DC CHARACTERISTICS Param Sym Characteristic No. V Supply Voltage DD D001 I Power-down Base Current PD D020E I Peripheral Module Current MOD D021E D022E D025E I Supply Current DD D010E D011E D012E D013E † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested ...

Page 98

... Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C -40°C Operating voltage V range as described in DC spec Section 12.1 “DC Charac- DD teristics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Character- istics: PIC16F716 (Industrial, Extended)”. Min Typ† Max Units V — ...

Page 99

... Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C -40°C Operating voltage V range as described in DC spec Section 12.1 “DC Charac- DD teristics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Character- istics: PIC16F716 (Industrial, Extended)”. Min Typ† Max Units — ...

Page 100

... TEMPERATURE AND VOLTAGE SPECIFICATIONS - AC Standard Operating Conditions (unless otherwise stated) Operating temperature AC CHARACTERISTICS Operating voltage V istics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Characteristics: PIC16F716 (Industrial, Extended)”. LC parts operate for commercial/industrial temp’s only. FIGURE 12-3: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS ...

Page 101

... All specified values Preliminary PIC16F716 Units Conditions MHz RC and XT Osc modes MHz HS Osc mode kHz LP Osc mode MHz RC Osc mode MHz XT Osc mode MHz HS Osc mode kHz ...

Page 102

... PIC16F716 FIGURE 12-5: CLKOUT AND I/O TIMING Q4 OSC1 CLKOUT I/O Pin (input) I/O Pin old value (output) Note 1: Refer to Figure 12-3 for load conditions. TABLE 12-3: CLKOUT AND I/O TIMING REQUIREMENTS Param Sym No. 10 OSC1 to CLKOUT OSC1 to CLKOUT OS CK 12* ...

Page 103

... TBD TBD TBD — 1024 T — OSC 28 72 132 TBD TBD TBD — — 2.1 100 — — Preliminary PIC16F716 31 34 Conditions 5V, -40°C to +125° 5V, -40°C to +85° 5V, +85°C to +125°C DD — OSC1 period OSC 5V, -40°C to +85°C ...

Page 104

... PIC16F716 FIGURE 12-8: TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS T0CKI T1OSO/T1CKI TMR0 or TMR1 Note 1: Refer to Figure 12-3 for load conditions. TABLE 12-5: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS Param Sym Characteristic No. 40* Tt0H T0CKI High Pulse Width 41* Tt0L T0CKI Low Pulse Width ...

Page 105

... Microchip Technology Inc. ( Typ Min † 0. — — 0. — — — Standard — 10 Extended — — Standard — 10 Extended — — Preliminary PIC16F716 Max Units Conditions — ns — ns — ns — ns — prescale value (1, DS41206A-page 103 ...

Page 106

... PIC16F716 TABLE 12-7: A/D CONVERTER CHARACTERISTICS: PIC16F716 (INDUSTRIAL, EXTENDED) Para m Sym Characteristic No. A00 V V Operation DD DD A01 N Resolution R A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 E Full scale error FS A06 E Offset error OFF A10 — ...

Page 107

... Data in “Typ” column unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following T 2: See Section 12.1 “DC Characteristics: PIC16F716 (Industrial, Extended)” for min. conditions.  2003 Microchip Technology Inc. (1) 131 130 ...

Page 108

... PIC16F716 NOTES: DS41206A-page 106 Preliminary  2003 Microchip Technology Inc. ...

Page 109

... C. 'Max' or 'min' represents (mean + respectively, where is standard deviation, over the whole temperature range. Graphs and Tables not available at this time.  2003 Microchip Technology Inc. (mean - 3 ) Preliminary PIC16F716 DS41206A-page 107 ...

Page 110

... PIC16F716 NOTES: DS41206A-page 108 Preliminary  2003 Microchip Technology Inc. ...

Page 111

... For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price.  2003 Microchip Technology Inc. Example PIC16F716-04/P 0023CBA Example PIC16F716 -20/SO 0018CDK Example PIC16F716 -20I/SS025 0020CBK Preliminary PIC16F716 DS41206A-page 109 ...

Page 112

... PIC16F716 18-Lead Plastic Dual In-line (P) – 300 mil (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing § ...

Page 113

... L .016 .033 .050 .009 .011 .012 B .014 .017 .020 Preliminary PIC16F716 A2 MILLIMETERS MIN NOM MAX 18 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.39 7.49 7.59 11.33 11.53 11.73 0.25 0.50 ...

Page 114

... PIC16F716 20-Lead Plastic Shrink Small Outline (SS) – 209 mil, 5.30 mm (SSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Foot Length Lead Thickness Foot Angle Lead Width Mold Draft Angle Top ...

Page 115

... PIC16C716.  2003 Microchip Technology Inc. APPENDIX B: CONVERSION CONSIDERATIONS This is a Flash program memory version of the PIC16C716 device. Refer to the migration document, DS40059, for more information about differences between the PIC16F716 and PIC16C716. Preliminary PIC16F716 DS41206A-page 113 ...

Page 116

... BORV. Brown-out Reset ensures the device is placed in a Reset condition fixed setpoint. DS41206A-page 114 To convert code written for PIC16C5X to PIC16F716, the user should take the following steps: 1. Remove any program memory page select operations (PA2, PA1, PA0 bits) for CALL, GOTO. ...

Page 117

... Microchip's development systems software products. Plus, this line provides information on how customers ® ® can receive the most current upgrade kits. The Hot Line or Microsoft Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. Preliminary PIC16F716 042003 DS41206A-page 115 ...

Page 118

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16F716 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

Page 119

... ANDWF Instruction ............................................................. 73 Assembler MPASM Assembler..................................................... 85 B Banking, Data Memory ................................................... 7, 11 BCF Instruction ................................................................... 74 Block Diagrams A/D .............................................................................. 51 Capture (CCP Module) ............................................... 34 Compare (CCP Module) ............................................. 35 Interrupt Sources ........................................................ 65 On-Chip Reset Circuit ................................................. 60 PIC16F716.................................................................... 5 PORTA.................................................................. 19, 20 PORTB........................................................................ 21 PWM (CCP Module) ................................................... 36 PWM (Enhanced)........................................................ 38 RB1/T1OSO/T1CKI..................................................... 22 RB2/T1OSI.................................................................. 22 RB3/CCP1/P1A........................................................... 23 RB4 ............................................................................. 23 RB5 ............................................................................. 24 RB6/P1C ..................................................................... 24 RB7/P1D ..................................................................... 25 Timer0 ...

Page 120

... PIC16F716 PICDEM 4 ................................................................... 88 PICDEM LIN PIC16C43X ........................................... 89 PICDEM USB PIC16C7X5.......................................... 89 PICDEM.net Internet/Ethernet .................................... 88 Development Support ......................................................... 85 Direct Addressing................................................................ 18 E ECCP Auto-Shutdown ........................................................... 45 and Automatic Restart ........................................ 47 Start-up Considerations .............................................. 47 Electrical Characteristics..................................................... 91 Enhanced Capture/Compare/PWM (ECCP) PWM Mode. See PWM (ECCP Module) Enhanced CCP Auto-Shutdown.......................................... 45 Enhanced PWM Mode. See PWM (ECCP Module)............ 38 Errata ...

Page 121

... Half-Bridge Mode........................................................ 42 Half-Bridge Output Mode Applications Example ........ 42 Output Configurations................................................. 38 Output Relationships (Active High and Low) .............. 40 Output Relationships (Active-High and Low).............. 39 Output Relationships Diagram.............................. 39, 41 Programmable Dead-band Delay ............................... 45 Setup for Operation .................................................... 48 Shoot-through Current ................................................ 45 Start-up Considerations .............................................. 47 Q Q-Clock....................................................................... 37, 100 Preliminary PIC16F716 DS41206A-page 119 ...

Page 122

... PIC16F716 R RA3:RA0 ............................................................................. 19 RA4/T0CKI Pin.................................................................... 20 RAM. See Data Memory. RB0 Pin ............................................................................... 21 Register File .......................................................................... 8 Register File Map .................................................................. 8 Registers A/D ADCON0 .............................................................. 49 A/D ADCON1 .............................................................. 49 A/D ADRES........................................................... 49, 50 ADCON0 ADCS1:ADCS0 Bits .................................... 49 ADCON0 ADON Bit .................................................... 49 ADCON0 CHS2:CHS0 Bits ......................................... 49 ADCON0 GO/DONE Bit ........................................ 49, 50 ADCON1 PCFG2:PCFG0 Bits .................................... 50 CCP1CON CCP1M3:CCP1M0 Bits ............................ 33 CCP1CON CCP1X:CCP1Y Bits ...

Page 123

... Enable (WDTE Bit)................................................ 56, 67 Postscaler. See Postscaler, WDT Programming Considerations ..................................... 67 RC Oscillator............................................................... 67 Time-out Period .......................................................... 67 Timing Diagram......................................................... 101 WDT Reset, Normal Operation ....................... 58, 62, 63 WDT Reset, Sleep .......................................... 58, 62, 63 WWW, On-Line Support ....................................................... 3 X XORLW Instruction ............................................................. 84 XORWF Instruction ............................................................. 84  2003 Microchip Technology Inc. Preliminary PIC16F716 DS41206A-page 121 ...

Page 124

... PIC16F716 NOTES: DS41206A-page 122 Preliminary  2003 Microchip Technology Inc. ...

Page 125

... Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2003 Microchip Technology Inc. XXX Examples: Pattern a) PIC16F716 -I/P 301= Industrial temp., PDIP package, QTP pattern #301. b) PIC16F716 - E/SO = Extended temp, SOIC package range 2.0V to 5.5V DD (Industrial) Note 1: Preliminary PIC16F716 . ...

Page 126

... Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands Biesbosch 14 NL-5152 SC Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 07/28/03  2003 Microchip Technology Inc. ...

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