DS26303L-120+ Maxim Integrated Products, DS26303L-120+ Datasheet - Page 38

IC LIU E1/T1/J1 3.3V 144-ELQFP

DS26303L-120+

Manufacturer Part Number
DS26303L-120+
Description
IC LIU E1/T1/J1 3.3V 144-ELQFP
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26303L-120+

Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.1.2
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Single-Rail Mode Select Channel n (SRMSn). When this bit is set, single-rail mode is selected for the
system transmit and receive n. If this bit is reset, dual-rail mode is selected.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Line Code Select Channel n (LCSn). When this bit is set, AMI encoding/decoding is selected for
LIUn. If reset B8ZS or HDB3 encoding/decoding is selected for LIUn. Note that if the GC.CODE bit is set, this
register is ignored.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Receive Power-Down Enable Channel n (RPDEn). When this bit is set, the receiver for LIUn is
powered down.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Transmit Power-Down Enable Channel n (TPDEn). When this bit is set, the transmitter for LIUn is
powered down.
Secondary Registers
SRMS8
RPDE8
TPDE8
LCS8
7
0
7
0
7
0
7
0
SRMS7
RPDE7
TPDE7
LCS7
6
0
6
0
6
0
6
0
SRMS
Single-Rail Mode Select Register
00h
LCS
Line Code Selection Register
01h
RPDE
Receive Power-Down Enable Register
03h
TPDE
Transmit Power-Down Enable Register
04h
SRMS6
RPDE6
TPDE6
LCS6
5
0
5
0
5
0
5
0
SRMS5
RPDE5
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
TPDE5
LCS5
38 of 101
4
0
4
0
4
0
4
0
SRMS4
RPDE4
TPDE4
LCS4
3
0
3
0
3
0
3
0
SRMS3
RPDE3
TPDE3
LCS3
2
0
2
0
2
0
2
0
SRMS2
RPDE2
TPDE2
LCS2
1
0
1
0
1
0
1
0
SRMS1
RPDE1
TPDE1
LCS1
0
0
0
0
0
0
0
0

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