DS26303L-120+ Maxim Integrated Products, DS26303L-120+ Datasheet - Page 40

• Manufacturer Part Number: DS26303L-120+
• Description: IC LIU E1/T1/J1 3.3V 144-ELQFP
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26303L-120+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.1.3 Individual LIU Registers
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Individual Jitter Attenuator Enable Channel n (IJAEn). When this bit is set, the LIUn jitter attenuator
is enabled. Note that if the GC.JAE bit is set, this register is ignored.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Individual Jitter Attenuator Position Select Channel n (IJAPSn). When this bit is set , the jitter
attenuator is in the receive path of LIUn, and when this bit is reset the jitter attenuator is in the transmit path of
LIUn. Note that if the GC.JAE bit is set, this register is ignored.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Individual Jitter Attenuator FIFO Depth Select n (IJAFDSn). When this bit is set for LIUn, the jitter
attenuator FIFO depth is 128 bits. When reset, the jitter attenuator FIFO depth is 32 bits. Note that if the
GC.IJAFDS bit is set, this register is ignored.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Individual Jitter Attenuator FIFO Limit Trip n (IJAFLTn). Set when the jitter attenuator FIFO
reaches to within 4 bits of its useful limit for the transmitter of LIUn. This bit is cleared when read if GISC.CWE is
reset. This bit is cleared by a write operation to the bit if GISC.CWE is set.
IJAFDS8
IJAFLT8
IJAPS8
IJAE8
7
0
7
0
7
0
7
0
IJAFDS7
IJAFLT7
IJAPS7
IJAE7
6
0
6
0
6
0
6
0
IJAE
Individual Jitter Attenuator Enable Register
00h
IJAPS
Individual Jitter Attenuator Position Select Register
01h
IJAFDS
Individual Jitter Attenuator FIFO Depth Select Register
02h
IJAFLT
Individual Jitter Attenuator FIFO Limit Trip Register
03h
IJAFDS6
IJAFLT6
IJAPS6
IJAE6
5
0
5
0
5
0
5
0
IJAFDS5
IJAFLT5
IJAPS5
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
IJAE5
40 of 101
4
4
0
4
0
0
4
0
IJAFDS4
IJAFLT4
IJAPS4
IJAE4
3
0
3
0
3
0
3
0
IJAFDS3
IJAFLT3
IJAPS3
IJAE3
2
0
2
0
2
0
2
0
IJAFDS2
IJAFLT2
IJAPS2
IJAE2
1
0
1
0
1
0
1
0
IJAFDS1
IJAFLT1
IJAPS1
IJAE1
0
0
0
0
0
0
0
0