DS26303L-120+ Maxim Integrated Products, DS26303L-120+ Datasheet - Page 59

IC LIU E1/T1/J1 3.3V 144-ELQFP

DS26303L-120+

Manufacturer Part Number
DS26303L-120+
Description
IC LIU E1/T1/J1 3.3V 144-ELQFP
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26303L-120+

Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.3.3
Dual-rail mode consists of TPOSn, TNEGn, and TCLKn pins on the system side. data is sampled on the falling
edge of TCLKn as shown in
the TNEGn is output on TRINGn after pulse shaping. The single-rail-select register
dual-rail or single-rail mode. The data that arrives at the TPOSn and TNEGn can be overwritten in the maintenance
mode by setting the BERT control register (BTCR).
6.3.4
Single-rail mode consists of TDATn and TCLKn pins on the system side. data is sampled on the falling edge of
TCLKn as shown in
on the TTIPn and TRINGn pins after pulse shaping. The single-rail-mode select (SRMS) is used for selection of
dual-rail or single-rail mode. The data that arrives at the TDATn can be overwritten in the maintenance mode by
setting in BERT control register (BTCR).
6.3.5 Zero Suppression—B8ZS or HDB3
B8ZS encoding is available when the device is in T1 mode selected by the TS2, TS1, and TS0 bits in the
register. Setting the LCS bit in the
code substitution can be selected. Bipolar violations can be inserted via the TNEGn/BPVIn pin or transmit
maintenance register settings only if B8ZS or HDB3 encoding is turned off. B8ZS substitution is defined in ANSI
T1.102 and HDB3 in ITU-T G.703 standards.
6.3.6 Transmit Power-Down
The transmitter is powered down if the relevant bits in the
6.3.7 Transmit All Ones
When transmit all ones is invoked, continuous 1s are transmitted using MCLK as the timing reference. Data input at
TPOSn and TNEGn is ignored. Transmit all ones can be sent by setting bits in the
are enabled if bits in register
register
6.3.8 Driver Fail Monitor
The driver fail monitor is connected to the TTIPn and TRINGn pins. It will detect a short circuit on the secondary
side of the transmit transformer. The drive current will be limited to 50mA if a short circuit is detected. The
status registers and the corresponding interrupt and enable registers can be used to monitor the driver failure.
6.4 Receiver
The DS26303 contains eight identical receivers. A 2:1 transformer steps down the input from the line. The
DS26303 is designed to be fully software-selectable for E1 and T1/J1 without the need to change any external
resistors for the receive side. The output of the internal termination circuitry is fed into a peak detector.
6.4.1 Peak Detector and Slicer
The slicer determines the polarity and presence of the received data. The output of the slicer is sent to the clock
and data recovery circuitry for extraction of data and clock. The slicer has a built-in peak detector for determination
of the slicing threshold.
6.4.2 Clock and Data Recovery
The resultant E1 or T1 clock derived from the 2.048 MHz/1.544 MHz PLL is internally multiplied by 16 by another
internal PLL and fed to the clock recovery system. The clock recovery system uses the clock from the PLL circuit to
form a 16-times oversampler, which is used to recover the clock and data. This oversampling technique offers
outstanding performance to meet jitter tolerance specifications.
Dual-Rail Mode
Single-Rail Mode
LOSS.
Figure
10-12. B8ZS or HDB3 encoding is allowed. The TDATn data is encoded in AMI format
Figure
ATAOS
10-12. The data that appears on the TPOSn pin is output on TTIPn and data on
LCS
are set and the corresponding receiver goes into an LOS state in the status
register enables B8ZS. If the LIU is configured in E1 mode, then HDB3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
59 of 101
TPDE
register are set.
TAOE
(SRMS)
register. Transmit all ones
is used for selection of
DFMS
TS

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