DS26303LN-120+ Maxim Integrated Products, DS26303LN-120+ Datasheet - Page 100

• Manufacturer Part Number: DS26303LN-120+
• Description: IC LIU E1/T1/J1 3.3V 144-ELQFP
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26303LN-120+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13 DOCUMENT REVISION HISTORY
REVISION
072205
060606
082306
020107
New product release.
Removed references to 160-ball PBGA package.
Deleted Special Test Functions and Metal Options sections (formerly Section 6.10 and 6.10.1).
Updated Package Drawing in Section 11.
Corrected various typos.
Added descriptions of feature enhancements implemented in Revision A2:
See below for additional/specific changes made.
(Page 6) Section 1: Detailed Description, paragraph 8: clarified transformer for transmit and
receive path (see sentence).
(Page 8) Table 2-2: Added specification: “Defines the 2048kHz synchronization interface
(Chapter 13). Contact factory for usage details.”
(Pages 11 to 18) Table 4-1: Updated “Function” descriptions for the following pins: TTIPn,
TRINGn, TPOSn/TDATAn, TNEGn, TCLKn, RPOSn/RDATAn, RNEGn/CVn, RLOSn, CLKA,
MODSEL, CSB/JAS, SCLK/ALE/ASB/TS2, RDB/RWB/TS1, SDI/WRB/DSB/T0,
SDO/RDY/ACKB/RIMPOFF, Dn/ADn/LPn, An/GMCn, CLKE, TVDDn; removed RXPROBEA1
(pin 35), scan_do (pin 113), scan_di (pin 106), scan_clk (pin 3), scan_en (pin 140), and BSWP
(pin 28); changed scan_mode (pin 94) to N.C.
(Page 19) Figure 4-1: Removed BSWP (pin 28), RXPROBEA1 (pin 35), RXPROBEC1 (pin 68),
RXPROBEB1 (pin 75); changed scan_mode to N.C. (pin 94).
(Page 20) Table 4-2: Changed scan_mode to N.C. (pin 94).
(Page 21) Section 4.1.2: Serial Port Operation. Deleted portion of sentence “All serial port
accesses are LSB first <when BSWP pin is low and MSB first when BSWP is high>.”
(Page 22) Section 4.1.4: Interrupt Handling. Updated whole section.
(Page 24) Section 5: Registers. Updated second and third sentence in first paragraph.
(Page 24) Table 5-1: Changed G.772 Monitor Configuration (GMC) to G.772 Monitor Control;
added “Status” to AIS register description; changed ADDP register name from Address Pointer
to Address Pointer for Bank Selection (see also Table 5-2, Table 5-3, and Table 5-4).
(Page 26) Table 5-4: Added Reserved register row for 0Fh; deleted Receive Bit Error Count
Register 4 (does not exist in this device) and changed to Reserved (17h).
(Page 27) Table 5-5: In GMC, changed bits 7, 6, 5 from Reserved to BERTDIR, BMCKS,
BTCKS (see register description on page 32) and corrected bits 4 to 0 to match description
(from GMC[4:1] to GMC[3:0]); for TST, changed bits 5 and 4 from T1MODE and TIMPRM to
Reserved to correctly match the description on page 35.
(Page 27) Table 5-6: Corrected SRS to SRMS.
(Page 28) Table 5-7: For GMR, changed bits 2 and 1 from Reserved to JABWS1 and JABWS0.
See also the GMR bit description on page 43.
(Page 28) Table 5-8: For BPCR2, BSPR2, and BSPR4, changed TYPE from “—“ to “RW”; for
BSR, changed TYPE from “R/W” to “R” and corrected PMS bit 3 to correctly show it is read-only
(added underline); for BSRL, changed TYPE from “RL/W” to “R” and corrected PMSL bit 3 to
correctly show it is read-only (added underline).
(Page 29) ALBC: changed register description from Analog Loopback Control to Analog
Loopback Configuration; RLBC: changed register description from Remote Loopback Control to
Remote Loopback Configuration and added note to bits 7 to 0 description.
1) Programmable corner frequency for the jitter attenuator in E1 mode (Section 5.1.3).
2) Fully internal impedance matching option for RTIP/RRING (Section 5.1.1).
3) Option for system-side deployment of BERT (Section 5.1.1.).
4) Revised B8ZS/HDB3 sections for clarification of functions (Section 6.3.3, 6.3.4).
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
100 of 101
DESCRIPTION