PIC16C73B-04/SP Microchip Technology Inc., PIC16C73B-04/SP Datasheet
PIC16C73B-04/SP
Specifications of PIC16C73B-04/SP
Related parts for PIC16C73B-04/SP
PIC16C73B-04/SP Summary of contents
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... CMOS Microcontrollers with A/D Converter Devices included in this data sheet: • PIC16C63A • PIC16C73B • PIC16C65B • PIC16C74B PIC16CXX Microcontroller Core Features: • High performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for program branches which are two cycle • ...
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... OSC2/CLKOUT 3 31 OSC1/CLKIN 4 30 PIC16C65B PIC16C74B RE2/CS/AN7 7 27 RE1/WR/AN6 8 26 RE0/RD/AN5 9 25 RA5/SS/AN4 10 24 RA4/T0CKI 11 23 PIC16C73B PIC16C74B 192 192 28 40 — Yes SPI/I C, USART SPI/I C, USART Yes Yes Yes Yes 11 12 28-pin SDIP, SOIC, 40-pin PDIP; SSOP, 44-pin PLCC, Windowed CERDIP ...
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... When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include liter- ature number) you are using. Customer Notification System Register on our web site at www.microchip.com/cn to receive the most current information on all of our products. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B PIC16C63A/65B/73B/74B ............................................................. 166 DS30605C-page 3 ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 4 2000 Microchip Technology Inc. ...
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... Receiver Transmitter (USART) is also known as the Serial Communications Interface or SCI. Also channel high speed 8-bit A/D is provided on the PIC16C73B, while the PIC16C74B offers 8 channels. The 8-bit resolution is ideally suited for applications requiring low cost analog interface, e.g., thermostat control, pressure sensing, etc. ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 6 2000 Microchip Technology Inc. ...
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... The OTP devices, packaged in plastic packages, per- mit the user to program them once. In addition to the program memory, the configuration bits must also be programmed. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 2.3 Quick-Turnaround-Production (QTP) Devices Microchip offers a QTP Programming Service for fac- tory production orders ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 8 2000 Microchip Technology Inc. ...
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... This symmetrical nature and lack of ‘special optimal situations’ make programming with the PIC16CXX simple yet efficient. In addition, the learning curve is reduced significantly. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B PIC16CXX devices contain an 8-bit ALU and working register. The ALU is a general purpose arithmetic unit. ...
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... Serial Port PORTA (2) RA0/AN0 (2) RA1/AN1 (2) RA2/AN2 (2) RA3/AN3/V REF RA4/T0CKI (2) RA5/SS/AN4 PORTB RB0/INT RB7:RB1 PORTC RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RC7/RX/DT (3) PORTD RD0/PSP0 RD1/PSP1 RD2/PSP2 RD3/PSP3 RD4/PSP4 RD5/PSP5 RD6/PSP6 RD7/PSP7 (3) PORTE (2,3) RE0/RD/AN5 (2,3) RE1/WR/AN6 (2,3) RE2/CS/AN7 2000 Microchip Technology Inc. ...
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... Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. 3: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 4: A/D module is not available in the PIC16C63A. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B I/O/P Buffer ...
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... I/O TTL Interrupt-on-change pin. 15 I/O TTL Interrupt-on-change pin. (2) 16 I/O TTL/ST Interrupt-on-change pin. Serial programming clock. (2) 17 I/O TTL/ST Interrupt-on-change pin. Serial programming data. I/O = input/output P = power ST = Schmitt Trigger input Description (5) . ( (5) or the slave select for 2000 Microchip Technology Inc. ...
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... This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel Slave Port mode (for interfacing to a microprocessor bus). 4: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise. 5: A/D is not available on the PIC16C65B. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B I/O/P Buffer ...
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... Q2, Q3 and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write PC+1 Fetch INST (PC+1) Execute INST (PC Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch Internal phase clock PC+2 Fetch INST (PC+2) Execute INST (PC+ Flush Fetch SUB_1 Execute SUB_1 2000 Microchip Technology Inc. ...
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... RESET Vector Interrupt Vector On-chip Program Memory (Page 0) On-chip Program Memory (Page 1) 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 4.2 Data Memory Organization The data memory is partitioned into multiple banks which contain the General Purpose Registers (GPR) and the Special Function Registers (SFR). Bits RP1 and RP0 are the bank select bits. RP1:RP0 (STATUS< ...
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... A0h FFh 2000 Microchip Technology Inc. ...
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... These registers can be addressed from either bank. 5: PORTD, PORTE and the parallel slave port are not implemented on the PIC16C63A/73B; always maintain these bits and registers clear. 6: The A/D is not implemented on the PIC16C63A/65B; always maintain these bits and registers clear. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Bit 5 Bit 4 ...
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... UA BF --00 0000 --00 0000 — — — — — — TRMT TX9D 0000 -010 0000 -010 0000 0000 0000 0000 — — — — — — — — — — PCFG1 PCFG0 ---- -000 ---- -000 2000 Microchip Technology Inc. ...
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... Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B It is recommended that only BCF, BSF, SWAPF and MOVWF instructions be used to alter the STATUS regis- ter. These instructions do not affect the bits in the STATUS register. For other instructions which do not affect status bits, see the " ...
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... R/W-1 R/W-1 R/W-1 T0CS T0SE PSA TMR0 Rate WDT Rate 128 1 : 128 1 : 256 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-1 R/W-1 R/W-1 PS2 PS1 PS0 bit Bit is unknown 2000 Microchip Technology Inc. ...
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... Note 1: A mismatch condition will exist until PORTB is read. After reading PORTB, the RBIF flag bit can be cleared. Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit, GIE (INTCON< ...
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... Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 (2) RCIE TXIE SSPIE W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-0 R/W-0 R/W-0 CCP1IE TMR2IE TMR1IE bit Bit is unknown 2000 Microchip Technology Inc. ...
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... PIC16C63A/65B devices do not have an A/D implemented. This bit location is reserved on these devices. Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit, or the global enable bit, GIE (INTCON< ...
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... W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared U-0 U-0 R/W-0 — — — CCP2IE bit Bit is unknown . U-0 U-0 R/W-0 — — — CCP2IF bit Bit is unknown 2000 Microchip Technology Inc. ...
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... BOR: Brown-out Reset Status bit Brown-out Reset occurred Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs) Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Note: BOR is unknown on POR. It must be set by the user and checked on subsequent RESETS to see if BOR is clear, indicating a brown-out has occurred. The BOR status bit is a “ ...
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... BSF PCLATH,3 ;Select page 1 (800h-FFFh) CALL SUB1_P1 : : ORG 0x900 SUB1_P1 : : : RETURN ® devices. The use of CALL OF A SUBROUTINE IN PAGE 1 FROM PAGE 0 ;Call subroutine in ;page 1 (800h-FFFh) ;page 1 (800h-FFFh) ;called subroutine ;page 1 (800h-FFFh) ;return to Call subroutine ;in page 0 (000h-7FFh) 2000 Microchip Technology Inc. ...
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... Data Memory 7Fh Bank 0 Note 1: For register file map detail, see Figure 4-2. 2: Shaded portions are not implemented; maintain the IRP and RP1 bits clear. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B EXAMPLE 4-2: movlw movwf NEXT clrf incf btfss ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 28 2000 Microchip Technology Inc. ...
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... Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. On the PIC16C73B/74B, PORTA pins are multiplexed with analog inputs and analog V input. The opera- REF tion of each pin is selected by clearing/setting the con- trol bits in the ADCON1 register (A/D Control Register1) ...
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... Input/output or slave select input for synchronous serial port or analog input. Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RA5 RA4 RA3 RA2 RA1 PORTA Data Direction Register — — — PCFG2 PCFG1 PCFG0 REF. Value on: Value on Bit 0 POR, all other BOR RESETS RA0 --0x 0000 --0u 0000 --11 1111 --11 1111 ---- -000 ---- -000 2000 Microchip Technology Inc. ...
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... PORTB. The “mismatch” outputs of RB7:RB4 are OR’d together to generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>). 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B This interrupt can wake the device from SLEEP. The user, in the Interrupt Service Routine, can clear the ...
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... Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RB5 RB4 RB3 RB2 RB1 T0CS T0SE PSA PS2 PS1 Value on: Value on Bit 0 POR, all other BOR RESETS RB0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 PS0 1111 1111 1111 1111 2000 Microchip Technology Inc. ...
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... SUMMARY OF REGISTERS ASSOCIATED WITH PORTC Address Name Bit 7 Bit 6 07h PORTC RC7 RC6 87h TRISC PORTC Data Direction register Legend unknown unchanged 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B FIGURE 5-5: PORT/PERIPHERAL Select Peripheral Data Out Data Bus D WR Port CK Data Latch D WR ...
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... PIC16C63A/65B/73B/74B 5.4 PORTD and TRISD Registers Note: The PIC16C63A and PIC16C73B do not provide PORTD. The PORTD and TRISD registers are not implemented. PORTD is an 8-bit port with Schmitt Trigger input buff- ers. Each pin is individually configured as an input or output. PORTD can be configured as an 8-bit wide micropro- cessor port (parallel slave port) by setting control bit PSPMODE (TRISE< ...
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... PORTE and TRISE Register Note 1: The PIC16C63A and PIC16C73B do not provide PORTE. The PORTE and TRISE registers are not implemented. 2: The PIC16C63A/65B does not provide an A/D module. A/D functions are not imple- mented. PORTE has three pins: RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/AN7, which are individually configured as inputs or outputs ...
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... PORTE Data Direction bits — — PCFG2 PCFG1 R/W-1 R/W-1 R/W-1 — TRISE2 TRISE1 TRISE0 bit Bit is unknown Value on: Value on Bit 0 POR, all other BOR RESETS RE0 ---- -xxx ---- -uuu 0000 -111 0000 -111 PCFG0 ---- -000 ---- -000 2000 Microchip Technology Inc. ...
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... Parallel Slave Port (PSP) Note: The PIC16C63A and PIC16C73B do not provide a parallel slave port. The PORTD, PORTE, TRISD and TRISE registers are not implemented. PORTD operates as an 8-bit wide Parallel Slave Port (PSP), or microprocessor port when control bit PSP- MODE (TRISE<4>) is set. In Slave mode asyn- ...
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... PCFG2 PCFG1 Value on: Value on Bit 0 POR, all other BOR RESETS xxxx xxxx uuuu uuuu RE0 ---- -xxx ---- -uuu RBIF 0000 000x 0000 000u 0000 -111 0000 -111 TMR1IF 0000 0000 0000 0000 0000 0000 PCFG0 ---- -000 ---- -000 2000 Microchip Technology Inc. ...
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... Watchdog Timer PSA WDT Enable bit Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>). 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Counter mode is selected by setting bit T0CS (OPTION_REG<5>). In counter mode, Timer0 will increment, either on every rising, or falling edge of pin RA4/T0CKI. The incrementing edge is determined by ...
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... R/W-1 R/W-1 R/W-1 T0CS T0SE PSA WDT Rate 128 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-1 R/W-1 R/W-1 PS2 PS1 PS0 bit Bit is unknown 2000 Microchip Technology Inc. ...
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... TMR0 Timer0 Module’s register 0Bh,8Bh INTCON GIE PEIE 81h OPTION_REG RBPU INTEDG Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by Timer0. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 T0IE INTE RBIE T0IF ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 42 2000 Microchip Technology Inc. ...
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... TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B In Timer mode, Timer1 increments every instruction cycle. In Counter mode, it increments on every rising edge of the external clock input. Timer1 can be enabled/disabled by setting/clearing control bit TMR1ON (T1CON<0>). ...
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... The prescaler, however, will continue to increment. TMR1 TMR1L TMR1ON T1SYNC On/Off (2) 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock T1CKPS1:T1CKPS0 TMR1CS Synchronized 0 Clock Input 1 Synchronize det 2 SLEEP Input 2000 Microchip Technology Inc. ...
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... Table 7-1 shows the capacitor selection for the Timer1 oscillator. The Timer1 oscillator is identical to the LP oscillator. The user must provide a software time delay to ensure proper oscillator start-up. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B TABLE 7-1: CAPACITOR SELECTION FOR THE TIMER1 OSCILLATOR ...
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... TMR1CS Value on: Value on Bit 1 Bit 0 POR, all other BOR RESETS INTF RBIF 0000 000x 0000 000u TMR1IF 0000 0000 0000 0000 TMR1IE 0000 0000 0000 0000 xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu TMR1ON --00 0000 --uu uuuu 2000 Microchip Technology Inc. ...
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... T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits 00 = Prescaler Prescaler Prescaler is 16 Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 8.1 Timer2 Prescaler and Postscaler The prescaler and postscaler counters are cleared when any of the following occurs: • a write to the TMR2 register • ...
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... TXIE SSPIE CCP1IE TMR2IE Value on Value on: all other Bit 1 Bit 0 POR, BOR RESETS 0000 000x 0000 000u INTF RBIF 0000 0000 0000 0000 TMR1IF 0000 0000 0000 0000 TMR1IE 0000 0000 0000 0000 1111 1111 1111 1111 2000 Microchip Technology Inc. ...
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... The PWMs will have the same frequency and update rate (TMR2 interrupt). PWM Capture None. PWM Compare None. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B CCP2 Module: Capture/Compare/PWM Register2 (CCPR2) is com- prised of two 8-bit registers: CCPR2L (low byte) and CCPR2H (high byte). The CCP2CON register controls the operation of CCP2. The special event trigger is ...
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... R = Readable bit -n = Value at POR DS30605C-page 50 U-0 R/W-0 R/W-0 R/W-0 — CCPxX CCPxY CCPxM3 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-0 R/W-0 R/W-0 CCPxM2 CCPxM1 CCPxM0 bit Bit is unknown 2000 Microchip Technology Inc. ...
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... Capture and Enable Edge Detect TMR1H CCP1CON<3:0> Q’s 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 9.1.2 TIMER1 MODE SELECTION Timer1 must be running in Timer mode or Synchro- nized Counter mode for the CCP module to use the capture feature. In Asynchronous Counter mode, the capture operation may not work. ...
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... CCPR1L CCPR1H (Slave) Comparator TMR2 Comparator PR2 Note 1: 8-bit timer is concatenated with 2-bit internal Q clock bits of the prescale, to create 10-bit time-base. SIMPLIFIED PWM BLOCK DIAGRAM CCP1CON<5:4> RC2/CCP1 (Note 1) S TRISC<2> Clear Timer, CCP1 pin and latch D.C. 2000 Microchip Technology Inc. ...
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... TABLE 9-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz PWM Frequency Timer Prescaler (1, 4, 16) PR2 Value Maximum Resolution (bits) 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 9.3.2 PWM DUTY CYCLE The PWM duty cycle is specified by writing to the CCPR1L register and to the CCP1CON<5:4> bits 10-bit resolution is available: the CCPR1L contains the eight MSbs and the CCP1CON< ...
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... T2CKPS0 -000 0000 -000 0000 xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu CCP1M1 CCP1M0 --00 0000 --00 0000 xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu CCP2M1 CCP2M0 --00 0000 --00 0000 2000 Microchip Technology Inc. ...
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... Slave mode (SCK is the clock input) • Clock Polarity (Idle state of SCK) • Clock edge (output data on rising/falling edge of SCK) • Clock Rate (Master mode only) • Slave Select mode (Slave mode only) 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B FIGURE 10-1: Read RC4/SDI/SDA RC5/SDO ...
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... C mode only). This bit holds the R/W bit information follow mode only modes Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R-0 R-0 R bit 0 ® Bit is unknown 2000 Microchip Technology Inc. ...
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... I C Slave mode, 7-bit address with START and STOP bit interrupts enabled 2 1111 = I C Slave mode, 10-bit address with START and STOP bit interrupts enabled Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B R/W-0 R/W-0 R/W-0 R/W-0 SSPEN CKP ...
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... SPI MODE TIMING (SLAVE MODE WITH CKE = 0) SS (optional) SCK (CKP = 0) SCK (CKP = 1) bit7 SDO SDI (SMP = 0) bit7 SSPIF DS30605C-page 58 bit6 bit5 bit3 bit4 bit6 bit5 bit3 bit4 bit2 bit1 bit0 bit0 bit0 bit2 bit1 bit0 bit0 2000 Microchip Technology Inc. ...
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... Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used by the SSP in SPI mode. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B bit5 ...
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... The high and low times of 2 the I C specification, as well as the requirement of the SSP module, is shown in timing parameter #100 and parameter #101 opera modes to be selected mode with the SSPEN bit set operation can be 2000 Microchip Technology Inc. ...
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... Note: Shaded cells show the conditions where the user software did not properly clear the overflow condition. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 1. Receive first (high) byte of address (bits SSPIF, BF, and bit UA (SSPSTAT<1>) are set). 2. Update the SSPADD register with second (low) byte of Address (clears bit UA and releases the SCL line) ...
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... The SSPSTAT register is used to determine the status of the byte. Receiving Data ACK ACK Cleared in software SSPBUF register is read Bit SSPOV is set because the SSPBUF register is still full Receiving Data ACK Bus Master terminates transfer ACK is not sent 2000 Microchip Technology Inc. ...
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... Data in sampled SSPIF (PIR1<3>) BF (SSPSTAT<0>) CKP (SSPCON<4>) 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF must be cleared in software, and the SSPSTAT register is used to determine the status of the byte. Flag bit SSPIF is set on the falling edge of the ninth clock pulse ...
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... BOR RESETS RBIF 0000 000x 0000 000u 0000 0000 0000 0000 0000 0000 0000 0000 xxxx xxxx uuuu uuuu 0000 0000 0000 0000 0000 0000 0000 0000 UA BF 0000 0000 0000 0000 1111 1111 1111 1111 2000 Microchip Technology Inc. ...
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... TX9D: 9th bit of Transmit Data. Can be parity bit. Legend Readable bit -n = Value at POR 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B as a half duplex synchronous system that can commu- nicate with peripheral devices, such as A/D or D/A inte- grated circuits, Serial EEPROMs etc. The USART can be configured in the following modes: • ...
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... Legend Readable bit -n = Value at POR DS30605C-page 66 R/W-0 R/W-0 U-0 RX9 SREN CREN — Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R-0 R-0 R-x FERR OERR RX9D bit Bit is unknown 2000 Microchip Technology Inc. ...
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... RX9 99h SPBRG Baud Rate Generator register Legend unknown unimplemented, read as '0'. Shaded cells are not used by the BRG. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B It may be advantageous to use the high baud rate (BRGH = 1) even for slower baud clocks. This is because the F OSC baud rate error in some cases ...
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... TSR register (if the TSR is empty). In such a case, an incorrect ninth data bit may be loaded in the TSR register. Data Bus TXREG register 8 MSb LSb (8) 0 TSR register TRMT TX9 TX9D Pin Buffer and Control RC6/TX/CK pin SPEN 2000 Microchip Technology Inc. ...
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... Shaded cells are not used for asynchronous transmission. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 4. If 9-bit transmission is desired, then set transmit bit TX9 ...
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... RCREG register, in order not to lose the old FERR and RX9D information. OERR CREN RSR Register MSb STOP (8) 7 Data RX9 Recovery RX9D RCREG Register RCIF Interrupt RCIE FERR LSb 1 0 START FIFO 8 Data Bus 2000 Microchip Technology Inc. ...
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... Shaded cells are not used for asynchronous reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C73/73A/76; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 5. Enable the reception by setting bit CREN. ...
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... TXIE (PIE1<4>), PEIE (INTCON<6>), and GIE (INTCON<7>), as required 9-bit transmission is desired, set bit TX9. 5. Enable the transmission by setting bit TXEN 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D. 7. Start transmission by loading data to the TXREG register. 2000 Microchip Technology Inc. ...
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... Note: Sync Master mode; SPBRG = ’0’. Continuous transmission of two 8-bit words. FIGURE 11-7: SYNCHRONOUS TRANSMISSION (THROUGH TXEN) RC7/RX/DT pin RC6/TX/CK pin Write to TXREG reg TXIF bit TRMT bit TXEN bit 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 T0IE INTE RBIE ...
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... RCIE was set. 8. Read the RCSTA register to get the ninth bit (if enabled) and determine if any error occurred during reception. 9. Read the 8-bit received data by reading the RCREG register. 10. If any error occurred, clear the error by clearing bit CREN. 2000 Microchip Technology Inc. ...
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... RC6/TX/CK pin Write to bit SREN SREN bit '0' CREN bit RCIF bit (interrupt) Read RXREG Note: Timing diagram demonstrates SYNC Master mode with bit SREN = '1' and bit BRG = '0'. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 T0IE INTE RBIE T0IF ...
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... RCIE was set. 6. Read the RCSTA register to get the ninth bit (if enabled) and determine if any error occurred during reception. 7. Read the 8-bit received data by reading the RCREG register any error occurred, clear the error by clearing bit CREN. 2000 Microchip Technology Inc. ...
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... Shaded cells are not used for synchronous slave reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear. 2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Bit 5 ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 78 2000 Microchip Technology Inc. ...
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... ADIF and ADIE bits are reserved and should be maintained clear. The 8-bit Analog-to-Digital (A/D) converter module has five inputs for the PIC16C73B and eight for the PIC16C74B. The A/D allows conversion of an analog input signal to a corresponding 8-bit digital number. The output of the sample and hold is the input into the converter, which generates the result via successive approximation ...
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... D = Digital I Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-0 R/W-0 R/W-0 PCFG2 PCFG1 PCFG0 bit 0 (1) (1) (1) RE0 RE1 RE2 V REF RA3 REF RA3 REF RA3 REF Bit is unknown 2000 Microchip Technology Inc. ...
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... Set GIE bit (INTCON<7>) FIGURE 12-1: A/D BLOCK DIAGRAM A/D Converter V REF (Reference Voltage) Note 1: Not available on PIC16C73B. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 3. Wait the required acquisition time. 4. Set GO/DONE bit (ADCON0) to start conversion. 5. Wait for A/D conversion to complete, by either: Polling for the GO/DONE bit to be cleared (if interrupts are disabled) ...
Page 82
... T will be no more than 16 sec Sampling Switch £ leakage ± 500 In(1/511 must ACQ the minimum acquisition time, ACQ SS C HOLD = DAC capacitance = 51 Sampling Switch (k ) 2000 Microchip Technology Inc. ...
Page 83
... The TRISE register is not provided on the PIC16C73B. 12.4 A/D Conversions Note: The GO/DONE bit should NOT be set in the same instruction that turns on the A/D. ...
Page 84
... PIC16C63A/65B/73B/74B TABLE 12-1: SUMMARY OF A/D REGISTERS (PIC16C73B/74B ONLY) Address Name Bit 7 Bit 6 INTCON GIE PEIE 0Bh,8Bh (1) PIR1 PSPIF ADIF 0Ch (1) PIE1 PSPIE ADIE 8Ch PIR2 — — 0Dh PIE2 — — 8Dh ADRES A/D Result register 1Eh ADCON0 ADCS1 ADCS0 1Fh ADCON1 — ...
Page 85
... Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of PWRTE. 2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B timers that offer necessary delays on power-up. One is the Oscillator Start-up Timer (OST), intended to keep the chip in RESET until the crystal oscillator is stable ...
Page 86
... See Table 13-1 and Table 13-2 for recommended values of C1 and C2. Note 1: A series resistor may be required for AT strip cut crystals. The FIGURE 13-2: EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) Clock from ext. system Open To internal logic SLEEP R F PIC16CXX OSC1 PIC16CXX OSC2 2000 Microchip Technology Inc. ...
Page 87
... ECS ECS-10-13-1 4 MHz ECS ECS-40-20-1 8 MHz EPSON CA-301 8.000M-C 20 MHz EPSON CA-301 20.000M-C 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Note 1: Higher capacitance increases the stability of the oscillator, but also increases the OSC2 start-up time 100 pF 2: Since each resonator/crystal has its own ...
Page 88
... Figure 13-4. The PICmicro devices have a MCLR noise filter in the MCLR Reset path. The filter will detect and ignore small pulses. It should be noted that internal RESET sources do not drive MCLR pin low. Enable PWRT Enable OST 2000 Microchip Technology Inc. S Chip Reset R Q ...
Page 89
... This helps to ensure that the crystal oscillator or resonator has started and stabilized. The OST time-out is invoked only for XT, LP and HS modes and only on Power-on Reset or wake-up from SLEEP. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 13.4.4 BROWN-OUT RESET (BOR) The configuration bit, BODEN, can enable or disable the Brown-out Reset circuit ...
Page 90
... Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 000x xuuu ( uuu1 0uuu — — POR BOR Wake-up from SLEEP 1024T OSC OSC — PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ---- --uu ---- --u0 ---- --uu 2000 Microchip Technology Inc. ...
Page 91
... Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 13-5 for RESET value for specific condition. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Power-on Reset MCLR Resets ...
Page 92
... Wake-up via WDT or Interrupt uuuu uu-u uuuu uuuu --uu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu -uuu --uu uuuu u-uu uuuu -uuu uuuu uuuu uuuu ---- ---u ---- --uu 1111 1111 uuuu uuuu --uu uuuu uuuu -uuu uuuu uuuu ---- -uuu 2000 Microchip Technology Inc. ...
Page 93
... The latency is the same for one or two cycle instructions. Individual interrupt flag bits are set, regardless of the status of their corresponding mask bit, PEIE bit, or the GIE bit. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Note interrupt occurs while the Global Inter- ...
Page 94
... T0IF INTF RBIF PSPIF PIC16C63A Yes Yes Yes PIC16C65B Yes Yes Yes PIC16C73B Yes Yes Yes PIC16C74B Yes Yes Yes 13.5.1 INT INTERRUPT The external interrupt on RB0/INT pin is edge trig- gered: either rising if bit INTEDG (OPTION_REG<6>) is set, or falling if the INTEDG bit is clear. When a valid edge appears on the RB0/INT pin, flag bit INTF (INTCON< ...
Page 95
... RESET (Watchdog Timer Reset). If the device is in SLEEP mode, a WDT time-out causes the device to wake-up and resume normal operation (Watchdog Timer Wake-up). The WDT can be permanently disabled by clearing configuration bit WDTE (Section 13.1). 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B The example: a) Stores the W register. b) Stores the STATUS register in bank 0 ...
Page 96
... Note 1: See Register 13-1 for operation of these bits. DS30605C-page 96 0 Postscaler MUX PSA 0 1 MUX WDT Time-out Bit 6 Bit 5 Bit 4 Bit 3 CP1 CP0 (1) BODEN PWRTE INTEDG T0CS T0SE PSA PS2:PS0 To TMR0 MUX (Figure 6-1) PSA Bit 2 Bit 1 Bit 0 WDTE FOSC1 FOSC0 (1) PS2 PS1 PS0 2000 Microchip Technology Inc. ...
Page 97
... A/D conversion (when A/D clock source is RC). 7. USART (Synchronous Slave mode). 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Other peripherals cannot generate interrupts since dur- ing SLEEP, no on-chip Q clocks are present. When the SLEEP instruction is being executed, the next instruction ( pre-fetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be set (enabled) ...
Page 98
... PIC16C6X/7X Programming Specifications (Literature #DS30228). FIGURE 13-8: External Connector Signals + CLK Data I (2) 0004h 0005h Inst(0004h) Inst(0005h) Dummy cycle Inst(0004h (see programming IL IHH TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections PIC16CXX MCLR/V PP RB6 RB7 Normal Connections 2000 Microchip Technology Inc. ...
Page 99
... Assigned to < > Register bit field In the set of i talics User defined term (font is courier) 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B The instruction set is highly orthogonal and is grouped into three basic categories: • Byte-oriented operations • Bit-oriented operations • Literal and control operations ...
Page 100
... TO 00 0000 0110 0011 1 C,DC,Z 11 110x kkkk kkkk 1010 kkkk kkkk TM Mid-Range MCU 2000 Microchip Technology Inc. Notes 1,2 1,2 2 1,2 1,2 1,2,3 1,2 1,2,3 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1 ...
Page 101
... Operands 255 Operation: (W) .AND. (k) (W) Status Affected: Z Description: The contents of W register are AND’ed with the eight bit literal 'k'. The result is placed in the W register. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B ANDWF AND W with f Syntax: [label] ANDWF Operands 127 d Operation: (W) .AND. (f) Status Affected: ...
Page 102
... None 00h ( register is cleared. Zero bit (Z) is set. Clear Watchdog Timer [ label ] CLRWDT None 00h WDT 0 WDT prescaler TO, PD CLRWDT instruction resets the Watch- dog Timer. It also resets the prescaler of the WDT. Status bits TO and PD are set. 2000 Microchip Technology Inc. ...
Page 103
... If ’d’ the result is placed in the W register. If ’d’ the result is placed back in register ’f’. If the result is 1, the next instruction is executed. If the result is 0, then a NOP is executed instead making instruction. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B GOTO Unconditional Branch Syntax: [ label ] Operands: ...
Page 104
... None The eight bit literal 'k' is loaded into W register. The don’t cares will assemble as 0’s. Move label ] MOVWF 127 (W) (f) None Move data from W register to register 'f'. No Operation [ label ] NOP None No operation None No operation. 2000 Microchip Technology Inc. ...
Page 105
... Operation: TOS PC Status Affected: None Description: Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two-cycle instruction. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B RLF Rotate Left f through Carry Syntax: [ label ] Operands 127 ...
Page 106
... The result is placed in the W register. XORWF Exclusive OR W with f Syntax: [label] XORWF Operands 127 d [0,1] Operation: (W) .XOR. (f) destination) Status Affected: Z Description: Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in register 'f'. 2000 Microchip Technology Inc. f,d ...
Page 107
... A project manager • Customizable toolbar and key mapping • A status bar • On-line help 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B The MPLAB IDE allows you to: • Edit your source files (either assembly or ‘C’) • One touch assemble (or compile) and download ...
Page 108
... PIC16C7X and PIC16CXXX families of 8-bit One- Time-Programmable (OTP) microcontrollers. The mod- ular system can support different subsets of PIC16C5X or PIC16CXXX products through the use of inter- changeable personality modules, or daughter boards. The emulator is capable of emulating without target application circuitry being present. 2000 Microchip Technology Inc. ...
Page 109
... PIC16C92X PIC17C76X, may be supported with an adapter socket. The PICSTART Plus development programmer is CE compliant. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 15.11 PICDEM 1 Low Cost PICmicro Demonstration Board The PICDEM 1 demonstration board is a simple board which demonstrates the capabilities of several of Microchip’s microcontrollers. The microcontrollers sup- ...
Page 110
... EE OQ Programming Tools K L evaluation and programming tools support EE OQ Microchip’s HCS Secure Data Products. The HCS eval- uation kit includes a LCD display to show changing codes, a decoder to decode transmissions and a pro- gramming interface to program test transmitters. 2000 Microchip Technology Inc. ...
Page 111
... PIC16C6X á á á á PIC16C5X á á á PIC14000 á á á á PIC12CXXX Tools Software Emulators 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B á á á á á á á á á á á á á á á á á ...
Page 112
... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 112 2000 Microchip Technology Inc. ...
Page 113
... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B (except V , MCLR and RA4) ...
Page 114
... V 3.5 V 3.0 V 2 (12.0 MHz/V) (V MAX Note the minimum voltage of the PICmicro DDAPPMIN Note 2: F has a maximum frequency of 10MHz. MAX DS30605C-page 114 PIC16CXXX-20 Frequency PIC16LCXXX-04 4 MHz 10 MHz Frequency - 2 MHz DDAPPMIN ® device in the application. 20 MHz 2000 Microchip Technology Inc. ...
Page 115
... FIGURE 16-3: PIC16C63A/65B/73B/74B VOLTAGE-FREQUENCY GRAPH 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 2.0 V 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B PIC16CXXX-04 4 MHz Frequency DS30605C-page 115 ...
Page 116
... BOR pin is strongly dependent on the applied voltage level. The specified lev- PP +70°C for commercial A +85°C for industrial A +70°C for commercial A +85°C for industrial A +125°C for extended A Conditions , DD and voltage trip point is reached. 2000 Microchip Technology Inc. ...
Page 117
... PICmicro device be driven with external clock in RC mode. 9: The leakage current on the MCLR/V els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Standard Operating Conditions (unless otherwise stated) Operating temperature 0° ...
Page 118
... The specified lev- PP +70°C for commercial A +85°C for industrial A +70°C for commercial A +85°C for industrial A +125°C for extended A Conditions = 4. 5.0 DD range and voltage trip point is reached. 2000 Microchip Technology Inc. ...
Page 119
... PICmicro device be driven with external clock in RC mode. 9: The leakage current on the MCLR/V els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Standard Operating Conditions (unless otherwise stated) Operating temperature 0° ...
Page 120
... A +70°C for commercial A +85°C for industrial A +125°C for extended A Conditions = 8.5 mA 4.5V 7.0 mA 4.5V 1.6 mA 4.5V 1.2 mA 4.5V -3.0 mA 4.5V -2.5 mA 4.5V -1.3 mA 4.5V -1.0 mA 4.5V and voltage trip point is reached. 2000 Microchip Technology Inc. ...
Page 121
... PICmicro device be driven with external clock in RC mode. 9: The leakage current on the MCLR/V els represent normal operating conditions. Higher leakage current may be measured at different input voltages. 10: Negative current is defined as current sourced by the pin. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Standard Operating Conditions (unless otherwise stated) Operating temperature 0° ...
Page 122
... BUF Bus free specifications only Hold ST DAT DATA input hold STA START condition DS30605C-page 122 specifications only specifications only) T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z Hi-impedance High High Low Low SU Setup STO STOP condition 2000 Microchip Technology Inc. ...
Page 123
... AC CHARACTERISTICS Operating voltage V LC parts operate for commercial/industrial temperatures only. FIGURE 16-4: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS Load condition 1 Pin Note 1: PORTD and PORTE are not implemented on the PIC16C63A/73B. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 0°C T +70°C A -40°C T +85°C A -40° ...
Page 124
... RC and XT osc modes ns HS osc mode (-04 osc mode (-20 osc mode ns RC osc mode ns XT osc mode ns HS osc mode (-04 osc mode (-20 osc mode 4/F CY OSC ns XT oscillator s LP oscillator ns HS oscillator ns XT oscillator ns LP oscillator ns HS oscillator 2000 Microchip Technology Inc. ...
Page 125
... Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. ††These parameters are asynchronous events not related to any internal clock edge. Note 1: Measurements are taken in RC mode where CLKOUT output 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Q1 Q2 ...
Page 126
... Typ† Max Units 2 — — — 1024 T — — OSC 28 72 132 ms — — 2.1 s 100 — — Conditions V = 5V, -40°C to +125° 5V, -40°C to +125° OSC1 period OSC V = 5V, -40°C to +125° (D005) DD VDD 2000 Microchip Technology Inc. ...
Page 127
... TCKEZtmr1 Delay from external clock edge to timer increment * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 41 ...
Page 128
... DS30605C-page 128 Min Typ† Max Units Conditions 0. — — PIC16LCXX 20 — 0. — — PIC16LCXX 20 — — — 10 PIC16LCXX — 25 — 10 PIC16LCXX — 25 — ns — ns — ns — ns — ns — ns — prescale value (1, 2000 Microchip Technology Inc. ...
Page 129
... TrdL2dtV RD and CS to data out valid 65* TrdH2dtI data out invalid * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 65 Characteristic Min 20 ...
Page 130
... PIC16LCXX — — PIC16CXX — PIC16LCXX 79 78 LSb LSb IN Typ† Max Units Conditions — — ns — — ns — — ns (Note 1) — — ns — — ns (Note 1) — — ns — — ns (Note 1) — — — — 100 ns 2000 Microchip Technology Inc. ...
Page 131
... SDO data output setup to SCK edge TdoV2scL † Data in “Typ” column 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 72 80 BIT6 - - - - - -1 ...
Page 132
... PIC16LCXX — PIC16CXX — PIC16LCXX 1. LSb 77 LSb IN Typ† Max Units Conditions — — ns — — ns — — ns (Note 1) — — ns — — ns (Note 1) — — ns — — ns (Note 1) — — — — — 100 ns — — ns 2000 Microchip Technology Inc. ...
Page 133
... SCK edge TscL2ssH † Data in “Typ” column 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Specification 73A is only required if specifications 71A and 72A are used. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B 72 80 BIT6 - - - - - -1 ...
Page 134
... STOP Condition Conditions Only relevant for Repeated START condition After this period the first clock pulse is generated 102 92 110 2000 Microchip Technology Inc. ...
Page 135
... LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line T 2 dard mode I C bus specification) before the SCL line is released. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Min Max 100 kHz mode 4.0 — ...
Page 136
... PIC16CXX — PIC16LCXX — — PIC16LCXX — 125 126 Min Typ† (DT setup 15 (DT hold time) 15 122 Typ† Max Units Conditions — — 100 ns — — — — Max Units Conditions — — ns — — ns 2000 Microchip Technology Inc. ...
Page 137
... TABLE 16-16: A/D CONVERTER CHARACTERISTICS: PIC16C73B/74B-04 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC16C73B/74B-20 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC16LC73B/74B-04 (COMMERCIAL, INDUSTRIAL) Param Sym Characteristic No. A01 N Resolution PIC16CXX R PIC16LCXX A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 E Full scale error FS A06 ...
Page 138
... LSb (i.e., 20.0mV @ 5.12V) from the last sampled voltage (as stated HOLD — If the A/D clock source is selected as RC, a time added before the A/D clock starts. This allows the SLEEP instruction to be executed 2000 Microchip Technology Inc. ...
Page 139
... V range). This is for information only and devices are ensured to operate properly only within the specified range. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B The data presented in this section is a statistical sum- mary of data collected on units from different lots over a period of time ...
Page 140
... F (MHz) OSC Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125° Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125° 2000 Microchip Technology Inc. ...
Page 141
... FIGURE 17-3: TYPICAL I DD 100 FIGURE 17-4: MAXIMUM I DD 160 140 120 100 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B vs. F OVER V – LP MODE OSC DD 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3 (kHz) OSC vs. F OVER V – LP MODE OSC DD 5.5 V 5.0 V 4.5 V 4 ...
Page 142
... V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 3.0 3.5 4.0 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 2.5 V 3.0 3.5 4.0 2000 Microchip Technology Inc. ...
Page 143
... FIGURE 17-8: AVERAGE F OSC 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B vs. V FOR VARIOUS RESISTANCES – RC MODE Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: Not recommended for operation over 4 MHz 3.5 4.0 4.5 ...
Page 144
... Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: 3.5 4.0 4.5 V (V) DD statistical mean @ 25°C mean – 3 (-40°C to 125°C) 3 100 k 5.0 5.5 statistical mean @ 25°C mean – 3 (-40°C to 125°C) 5.0 5.5 2000 Microchip Technology Inc. ...
Page 145
... IH DD 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B OVER TEMPERATURE – SCHMITT TRIGGER INPUT (I Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: 3.5 4.0 4.5 V (V) DD OVER TEMPERATURE – SCHMITT TRIGGER INPUT Typical: Maximum: mean + 3 (-40° ...
Page 146
... Min (125° (mA 5 Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: Max (-40°C) Typical (25°C) Min (125° (mA) OH statistical mean @ 25°C mean – 3 (-40°C to 125° statistical mean @ 25°C mean – 3 (-40°C to 125° 2000 Microchip Technology Inc. ...
Page 147
... FIGURE 17-16 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B = 3 Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: Max (125°C) Typ (25°C) Min (-40° (-mA 5 Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: Max (125° ...
Page 148
... Minimum: Max (125°C) Typ (125°C) 3.5 4.0 4.5 V (V) DD statistical mean @ 25°C mean – 3 (-40°C to 125°C) Max 85°C Typ 85°C 5.0 5.5 statistical mean @ 25°C mean – 3 (-40°C to 125°C) 5.0 5.5 2000 Microchip Technology Inc. ...
Page 149
... FIGURE 17-20: I vs. V TIMER 1 120 100 2.5 3.0 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B OVER TEMPERATURE (-40°C TO +125°C) Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: Device Indeterminant SLEEP State Device in RESET 3.5 4.0 V (V) DD (-10°C TO +70°C) ...
Page 150
... Maximum: mean + 3 (-40°C to 125°C) Minimum: 3.5 4.0 4.5 V (V) DD statistical mean @ 25°C mean – 3 (-40°C to 125°C) Max (-40°C to 125°C) Typical (25°C) 5.0 5.5 statistical mean @ 25°C mean – 3 (-40°C to 125°C) 5.0 5.5 2000 Microchip Technology Inc. ...
Page 151
... FIGURE 17-23: AVERAGE WDT PERIOD vs 2.5 3.0 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B OVER TEMPERATURE (-40°C TO +125°C) DD Typical: Maximum: mean + 3 (-40°C to 125°C) Minimum: 125°C 85°C 25°C -40°C 3.5 4.0 4.5 V (V) DD statistical mean @ 25°C mean – 3 (-40°C to 125°C) 5 ...
Page 152
... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 152 2000 Microchip Technology Inc. ...
Page 153
... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Example PIC16C73B-04/SP 0017HAT Example PIC16C73B/JW 0017CAT ...
Page 154
... TQFP XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN 44-Lead MQFP XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN 44-Lead PLCC XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN DS30605C-page 154 Example PIC16C74B-04/P 0017SAA Example PIC16C74B/JW 0017HAT Example PIC16C74B -20/PT 0017HAT Example PIC16C74B -20/PQ 0017SAT Example PIC16C74B -20/L 0017SAT 2000 Microchip Technology Inc. ...
Page 155
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimension D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-095 Drawing No. C04-070 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Units INCHES* MIN ...
Page 156
... Microchip Technology Inc. ...
Page 157
... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-052 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Units ...
Page 158
... A2 MILLIMETERS* MIN NOM MAX 28 0.65 1.73 1.85 1.98 1.63 1.73 1.83 0.05 0.15 0.25 7.59 7.85 8.10 5.11 5.25 5.38 10.06 10.20 10.34 0.56 0.75 0.94 0.10 0.18 0.25 0.00 101.60 203.20 0.25 0.32 0. 2000 Microchip Technology Inc. ...
Page 159
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-011 Drawing No. C04-016 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Units INCHES* ...
Page 160
... Microchip Technology Inc. ...
Page 161
... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D1 and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-026 Drawing No. C04-076 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B ...
Page 162
... NOM MAX 44 0.80 11 2.00 2.18 2.35 1.95 2.03 2.10 0.05 0.15 0.25 0.73 0.88 1.03 1.60 0 3.5 7 12.95 13.20 13.45 12.95 13.20 13.45 9.90 10.00 10.10 9.90 10.00 10.10 0.13 0.18 0.23 0.30 0.38 0.45 0.64 0.89 1. 2000 Microchip Technology Inc. ...
Page 163
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-047 Drawing No. C04-048 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B D D1 CH1 ...
Page 164
... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 164 2000 Microchip Technology Inc. ...
Page 165
... Microchip Technology Inc. PIC16C63A/65B/73B/74B Revision Description have been specified graphs for device operating area (in Electrical DD Specifications) TM Mid-Range MCU Family Reference Manual, PIC16C65B PIC16C73B no 5 channels, 8 bits yes no 40-pin PDIP, 40-pin 28-pin PDIP, 28-pin windowed CERDIP, windowed CERDIP, 44-pin TQFP, 44-pin ...
Page 166
... H/W - Issues may exist with regard to the application circuits. S/W - Issues may exist with regard to the user program. Prog. - Issues may exist when writing the program to the controller. DS30605C-page 166 PIC16C63A/65B/73B/74B H/W S/W Prog. 2000 Microchip Technology Inc. ✔ — — ✔ — ...
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... ADRES register may be read on the following T 3: This is the time that the actual conversion requires. 4: This is the time from when the GO/DONE bit is set, to when the conversion result appears in ADRES. 5: Specification 73A is only required if specifications 71A and 72A are used. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B PIC16C63/65A/73A/74A Min Typ† ...
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... PC or add to PC, etc.) to make sure page bits are set properly under the new scheme. 3. Eliminate any data memory page switching. Redefine data variables to reallocate them. 4. Verify all writes to STATUS, OPTION and FSR registers since these have changed. 5. Change RESET vector to 0000h. and , 2000 Microchip Technology Inc. ...
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... RB7:RB4 Port Pins ..................................................... 31 2 SSP Mode......................................................... 60 SSP in SPI Mode ........................................................ 55 Timer0/WDT Prescaler................................................ 39 Timer2 ......................................................................... 47 USART Receive.......................................................... 70 USART Transmit ......................................................... 68 Watchdog Timer .......................................................... 96 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B BOR bit ......................................................................... 25, 89 BRGH bit ............................................................................ 67 Brown-out Reset (BOR) Timing Diagram ........................................................ 126 Buffer Full Status bit, BF..................................................... bit .................................................................................... 19 Capture/Compare/PWM Capture Block Diagram ...
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... Evaluation and Programming Tools .................... 110 Loading of PC ..................................................................... 26 M MCLR............................................................................ 87, 90 Memory Data Memory .............................................................. 15 Program Memory ........................................................ 15 Program Memory Maps PIC16C73 ........................................................... 15 PIC16C73A......................................................... 15 PIC16C74 ........................................................... 15 PIC16C74A......................................................... 15 Register File Maps PIC16C73 ........................................................... 16 PIC16C73A......................................................... 16 PIC16C74 ........................................................... 16 PIC16C74A......................................................... 16 PIC16C76 ........................................................... 16 PIC16C77 ........................................................... 16 ® MPLAB Integrated Development Environment Software ...................................................... 107 2000 Microchip Technology Inc. ...
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... RB4 ....................................................................... 11, 12 RB5 ....................................................................... 11, 12 RB6 ....................................................................... 11, 12 RB7 ....................................................................... 11, 12 RC0/T1OSO/T1CKI .............................................. 11, 13 RC1/T1OSI/CCP2................................................. 11, 13 RC2/CCP1 ............................................................ 11, 13 RC3/SCK/SCL ...................................................... 11, 13 RC4/SDI/SDA ....................................................... 11, 13 RC5/SDO .............................................................. 11, 13 RC6/TX/CK ............................................... 11, 13, 65–76 RC7/RX/DT ............................................... 11, 13, 65–76 RD0/PSP0................................................................... 13 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B RD1/PSP1 .................................................................. 13 RD2/PSP2 .................................................................. 13 RD3/PSP3 .................................................................. 13 RD4/PSP4 .................................................................. 13 RD5/PSP5 .................................................................. 13 RD6/PSP6 .................................................................. 13 RD7/PSP7 .................................................................. 13 RE0/RD/AN5 .............................................................. 13 RE1/WR/AN6.............................................................. 13 RE2/CS/AN7............................................................... 13 V ...
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... Timer0 External Clock .................................................... 40 Interrupt .............................................................. 39 Prescaler ............................................................ 40 Prescaler Block Diagram .................................... 39 Section................................................................ 39 T0CKI ................................................................. 40 T0IF .................................................................... 94 TMR0 Interrupt ................................................... 94 Timer1 Asynchronous Counter Mode ............................. 45 Capacitor Selection ............................................ 45 Operation in Timer Mode.................................... 44 Oscillator............................................................. 45 Prescaler ............................................................ 45 Resetting of Timer1 Registers ............................ 45 Resetting Timer1 using a CCP Trigger Output .................................................... 45 Synchronized Counter Mode .............................. 44 T1CON ............................................................... 43 2000 Microchip Technology Inc. ...
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... TOUTPS1 bit....................................................................... 47 TOUTPS2 bit....................................................................... 47 TOUTPS3 bit....................................................................... 47 TRISA Register ............................................................. 18, 29 TRISB Register ............................................................. 18, 31 TRISC Register ............................................................. 18, 33 TRISD Register ............................................................. 18, 34 TRISE Register ....................................................... 18, 35, 36 TXSTA Register .................................................................. 65 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B U UA....................................................................................... 56 Universal Synchronous Asynchronous Receiver Transmitter (USART) .......................................................... 65 Update Address bit, UA ...................................................... 56 USART Asynchronous Mode................................................... 68 Asynchronous Receiver ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 174 2000 Microchip Technology Inc. ...
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... Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS30605C-page 176 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS30605C 2000 Microchip Technology Inc. ...
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... The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B /XX XXX ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 178 2000 Microchip Technology Inc. ...
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... NOTES: 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B DS30605C-page 179 ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 180 2000 Microchip Technology Inc. ...
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... NOTES: 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B DS30605C-page 181 ...
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... PIC16C63A/65B/73B/74B NOTES: DS30605C-page 182 2000 Microchip Technology Inc. ...
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... NOTES: 2000 Microchip Technology Inc. PIC16C63A/65B/73B/74B DS30605C-page 183 ...
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... Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec- tual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. ...