TLK3114SCGNT | |
|---|---|
| Manufacturer Part Number | TLK3114SCGNT |
| Description | IC TXRX XAUI 10GBPS 289-BGA |
| Manufacturer | Texas Instruments |
| Type | Transceiver |
| TLK3114SCGNT datasheets |
|
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Specifications of TLK3114SCGNT | |||
|---|---|---|---|
| Number Of Drivers/receivers | 4/4 | Protocol | XAUI, XGMIII |
| Voltage - Supply | 2.3 V ~ 2.7 V | Mounting Type | Surface Mount |
| Package / Case | 289-BGA | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Other names | 296-15738 | ||
PrevNext
TERMINAL
XGMII
XGMII
NAME
NAME
NUMBER
C11, B11,
HSTL/SST
E12, D12,
RDA[0:7]
RXD[0:7]
C12, C13,
L_2 output
B13, A13
HSTL/SST
RDA8
B14
RXC0
L_2 output
HSTL/SST
RDA9
A14
N/A
L_2 output
C14, C15,
C16, C17,
RDB[0:7]
RXD[8:15]
D13, D15,
D16, E13
R14, R15,
R16, R17,
HSTL/SST
RDC[0:7]
RXD[16:23]
P13, P15,
L_2 output
P16, N13
R11, T11,
N12, P12,
RDD[0:7]
RXD[24:31]
R12, R13,
T13, U13
RDB8
E15
RXC1
HSTL/SST
RDC8
N15
RXC2
L_2 output
RDD8
T14
RXC3
RDB9
E16
HSTL/SST
RDC9
N16
N/A
L_2 output
RDD9
U14
Table 2−3. Parallel Data Terminals
TYPE
TYPE
DESCRIPTION
DESCRIPTION
Receive data terminals, channel A. Parallel data on this bus is valid on the rising and
falling edges of RCA.
These terminals have internal series termination to provide direct connection to a
50-Ω transmission line.
Receive data/K-flag, channel A. When CODE is low, this terminal is the ninth bit of
a received 8-b/10-b encoded byte. When CODE is high, this terminal acts as the
K-character flag. When this terminal is high, it indicates the data on RDA(0–7) is a
valid K-character. Data on this terminal is valid on the rising and falling edges of RCA.
This terminals has internal series termination to provide direct connection to a 50-Ω
transmission line.
Receive data terminal/error detect, channel A. When CODE is low, this terminal is
the tenth bit of a 8-b/10-b encoded byte. When CODE is high, this terminal goes high
to signify the occurrence of either a disparity error or an invalid code word during the
decoding of the received data. Data on this terminal is valid on the rising and falling
edges of RCA.
This terminal has internal series termination to provide direct connection to a 50-Ω
transmission line.
Receive data terminals, channels B–D. When PSYNC is low, parallel data on these
Receive data terminals, channels B–D. When PSYNC is low, parallel data on these
buses is valid on the rising and falling edges of the recovered data clock (RCB, RCC,
or RCD). When PSYNC is high, data on each bus is valid on the rising and falling
edges of RCA.
These terminals are series terminated to provide direct connection to a 50-Ω
These terminals are series terminated to provide direct connection to a 50-Ω
transmission line.
Receive data/K-flag, channels B–D. When PSYNC is low, data on these terminals
is valid on the rising and falling edges of the recovered clock (RCB, RCC, or RCD).
When PSYNC is high, data on these terminals is valid on the rising and falling edges
of RCA.
When CODE is low, these terminals are the ninth bit of a received 8-b/10-b encoded
byte. When CODE is high, these terminals act as the K-character flag. When
asserted high, this indicates the data on RDx[0:7] is a valid K-character.
These terminals are series terminated to provide direct connection to a 50-Ω
transmission line.
Receive data terminal/error detect, channels B–D. When PSYNC is low, data on
these terminals is valid on the rising and falling edges of recovered channel clock
(RCB, RCC, RCD). When PSYNC is high, data on these terminals is valid on the
rising and falling edges of RCA.
When CODE is low, these terminals are the tenth bit of a 8-b/10-b encoded byte.
When CODE is high, these terminals provide an error detection flag. The error detect
is asserted high to signify the occurrence of either a disparity error or an invalid code
word during the decoding of the received data.
These terminals have internal series termination to provide direct connection to a
50-Ω transmission line.
2−3
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