TLK3114SCGNT | |
|---|---|
| Manufacturer Part Number | TLK3114SCGNT |
| Description | IC TXRX XAUI 10GBPS 289-BGA |
| Manufacturer | Texas Instruments |
| Type | Transceiver |
| TLK3114SCGNT datasheets |
|
Availability: In stock
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Warranty: 60 days
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Specifications of TLK3114SCGNT | |||
|---|---|---|---|
| Number Of Drivers/receivers | 4/4 | Protocol | XAUI, XGMIII |
| Voltage - Supply | 2.3 V ~ 2.7 V | Mounting Type | Surface Mount |
| Package / Case | 289-BGA | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Other names | 296-15738 | ||
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Table 3−18. Global Configuration Register Bit Definitions (Register 16)
BIT(S)
NAME
15
Reserved
Read returns 0, writes are ignored.
1 = Enable deskew state machine described in Figure 3−10.
14
De-skew state machine
0 = Disable deskew state machine (default).
Channel synchronization
1 = Enable channel synchronization state machine described in Figure 3−7.
13
state machine
0 = Disable channel synchronization state machine (default).
IPG management state
1 = Enable IPG management state machine described in Figure 3−13.
12
machine
0 = Disable IPG management state machine (default).
Clock tolerance
1 = Enable clock tolerance compensation.
11
compensation
0 = Disable clock tolerance compensation (default).
Multifunction (MF[A−D]) terminal configuration.
Bit 10
0
10:9
Multifunction pin output
0
1
1
1 = Enable LOS condition described in Table 3−6 for all channels (default).
8
Loss of signal detection
0 = Disable this function.
Configuration bits (see Table 3−10), default value = 0.
When CONFIG1 = low, this bit can be set to 1.
7
Configuration: Config1
When CONFIG1 = high, this bit is read-only.
Logically ORed with external input CONFIG1.
Configuration bits (see Table 3−10), default value = 0
When CONFIG0 = low, this bit can be set to 1.
6
Configuration: Config0
When CONFIG0 = high, this bit is read-only.
Logically ORed with external input CONFIG0.
5
Preemphasis: Pre2
Programmable preemphasis control (see Table 3−9), default value = 0.
4
Preemphasis: Pre1
Programmable preemphasis control (see Table 3−9), default value = 0.
3
Reserved
Read returns a 0, writes are ignored.
1 = Enable PRBS internal generation and verification on all channels
0 = Normal operation (default).
2
PRBS enable
When PRBSEN = low, this bit can be set to 1.
When PRBSEN = high, this bit is read-only.
Logically ORed with PRBSEN.
1 = Enable K28.5 code detection and bit alignment on all channels (default).
0 = Disable K28.5 code detection on all channels.
1
Comma detect enable
Logically AND’ed with SYNCEN.
0
Reserved
Read returns a 0, writes are ignored.
DESCRIPTION
Bit 9
Output
0
HSTL = 1, SSTL_2 = 0 (default)
1
1 = Comma detected, 0 = data
0
Register 22, bits 3−0 (LOS)
1
Register 22, bits 7−4 (PRBS pass)
READ/WRITE
Read-only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Read/Write
Read/Write
Read/Write
3−25
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