TLK3114SCGNT | |
|---|---|
| Manufacturer Part Number | TLK3114SCGNT |
| Description | IC TXRX XAUI 10GBPS 289-BGA |
| Manufacturer | Texas Instruments |
| Type | Transceiver |
| TLK3114SCGNT datasheets |
|
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Warranty: 60 days
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Specifications of TLK3114SCGNT | |||
|---|---|---|---|
| Number Of Drivers/receivers | 4/4 | Protocol | XAUI, XGMIII |
| Voltage - Supply | 2.3 V ~ 2.7 V | Mounting Type | Surface Mount |
| Package / Case | 289-BGA | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
| Other names | 296-15738 | ||
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Table 3−42. 10G DTE XS Status 2 Register (Register 5.8)
BIT(S)
NAME
15
Device present
14
Device present
13:12
Reserved
11
Transmit local fault
10
Receive local fault
9:0
Reserved
Table 3−43. 10G DTE XGXS Lane Status Register (Register 5.24)
BIT(S)
NAME
15:13
Reserved
12
Lane alignment
11:4
Reserved
3
Lane D sync
2
Lane C sync
1
Lane B sync
0
Lane A sync
MDIO registers 5.32768−5.32781 are analogous to registers 16−29. The following table cross references the
appropriate register definition.
Table 3−44. DTE XS Register Cross Reference (Registers 5.32768−5.32776)
REGISTER
NAME
ADDRESS
5.32768
DTE XS global configuration
DTE XS channel A−D
5.32769−5.32772
configuration
5.32774
DTE XS channel status
5.32775
DTE XS channel sync status
5.32776
DTE XS CTC status
5.32777
Error counter control
5.32778−5.32781
Channel A−D error count
3.26 Operating Frequency Range
The TLK3114SC device is optimized for operation at a serial data rate of 3.125 Gbps. The TLK3114SC device may
operate at a serial data rate between 2.5 Gbps to 3.125 Gbps. The external differential reference clock has an
operating frequency from 125 MHz to 156.25 MHz. The reference clock frequency must be within ±100 PPM and have
less than 40 ps of jitter.
3.27 Power-Down Mode
When the ENABLE terminal is held low, the TLK3114SC device enters a low power quiescent state. In this state, all
analog and digital circuitry is disabled. In the power-down mode, the serial transmit and the receive data bus terminals
for all channels are in a high-impedance state.
3−36
DESCRIPTION
Read returns 1.
Read returns 0.
Read is ignored.
1 = Transmit fault detected
0 = No transmit fault detected
Latches high until read.
1 = Receive fault detected
0 = No receive fault detected
Latches high until read.
Read is ignored.
DESCRIPTION
Read is ignored.
1 = DTE XGXS transmit lanes aligned
0 = DTE XGXS transmit lanes not aligned
Read is ignored.
Lane D is synchronized
Lane C is synchronized
Lane B is synchronized
Lane A is synchronized
EQUIVALENT
EQUIVALENT REGISTER
REGISTER
NAME
ADDRESS
16
Global configuration
17−20
Channel A−D configuration
22
Channel status
23
Channel sync status
24
CTC status
25
Error counter control
26−29
Channel A−D error count
READ/WRITE
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
READ/WRITE
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
DEFINITION
See Table 3−18
See Table 3−19, Table 3−20,
Table 3−21, and Table 3−22
See Table 3−23
See Table 3−24
See Table 3−25
See Table 3−26
See Table 3−27, Table 3−28,
Table 3−29, and Table 3−30
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