ATA6624C-PGQW Atmel, ATA6624C-PGQW Datasheet
ATA6624C-PGQW
Specifications of ATA6624C-PGQW
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ATA6624C-PGQW Summary of contents
Page 1
... LIN-driver ensures secure data communication up to 20kBaud. Sleep Mode and Silent Mode guarantee very low current consumption. The Atmel ATA6626 is able to switch the LIN unlimited to dominant level via TXD for low data rates. LIN Bus Transceiver with 3.3V (5V) Regulator and Watchdog ATA6622 ATA6624 ATA6626 ATA6622C ATA6624C ATA6626C 4986J–AUTO–03/11 ...
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... Fail-safe 10 Mode INH PVCC 9 RXD 4 WAKE 16 Edge KL_15 Detection PVCC 11 Time-out TXD Timer *) GND *) Not in ATA6626 Atmel ATA6622/ATA6624/ATA6626 2 Receiver - + Wake-up Bus Timer Slew Rate Control TXD Control Unit Internal Testing Watchdog Unit PVCC MODE TM NTRIG Normal Mode RF Filter Short Circuit and ...
Page 3
... KL_15 Ignition detection (edge sensitive) 17 GND System ground (optional) 18 PVCC 3.3V/5V regulator sense input pin 19 VCC 3.3V/5V regulator output/driver pin 20 VS Battery supply Backside Heat slug is connected to all GND pins 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 ATA6622/24/26 GND 2 14 QFN NTRIG 3 13 ...
Page 4
... GND shifts or battery disconnection. LIN receiver thresholds are compatible with the LIN protocol specification. The fall time from recessive to dominant bus state and the rise time from dominant to recessive bus state are slope controlled. Atmel ATA6622/ATA6624/ATA6626 27V. An undervoltage detection is implemented to ...
Page 5
... Mode Input Pin (MODE) Connect the MODE pin directly or via an external resistor to GND for normal watchdog opera- tion. To debug the software of the connected microcontroller, connect MODE pin to 3.3V/5V and the watchdog is switched off. 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 > 6ms, DOM = 0V). S typ. 57µA. The ...
Page 6
... TM Input Pin The TM pin is used for final production measurements at Atmel to be always connected to GND. 3.14 KL_15 Pin The KL_15 pin is a high-voltage input used to wake up the device from Sleep or Silent Mode edge sensitive pin (low-to-high transition usually connected to ignition to generate a local wake-up in the application when the ignition is switched on ...
Page 7
... Normal Mode VCC: 3.3V/5V with undervoltage monitoring Communication: ON Watchdog: ON Table 4-1. Mode of Operation Transceiver Fail-safe Normal Silent Sleep 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 Unpowered Mode Batt b a Fail-safe Mode VCC: 3.3V/5V with undervoltage monitoring Communication: OFF Watchdog silent command TXD = 1 Local wake-up event ...
Page 8
... If an undervoltage condition occurs, NRES is switched to low, and the IC changes its state to Fail-safe Mode. A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LIN receiver and switches on the internal slave termination between the LIN pin and the V Figure 4-2. Atmel ATA6622/ATA6624/ATA6626 8 Switch to Silent Mode Normal Mode EN ...
Page 9
... LOW than the TXD. Therefore, the best and easiest way are two falling edges at TXD and EN at the same time.The transmission path is disabled in Sleep Mode. The supply current I 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 ) and the following rising edge at the LIN pin (see bus Figure 4-3 on page 9) ...
Page 10
... V Batt up. A low at NRES switches into Fail-safe Mode directly. During Fail-safe Mode the TXD pin is an output and signals the last wake-up source. Atmel ATA6622/ATA6624/ATA6626 10 ) and a following rising edge at pin LIN results in a remote wake-up request. The bus Switch to Sleep Mode ...
Page 11
... The NRES is low for the reset time delay t possible. Figure 4-5. LIN bus voltage regulator Watchdog 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 Figure 5-1 on page , the IC mode changes from Unpowered Mode to Fail-safe Mode. th LIN Wake Up from Sleep Mode Bus wake-up filtering time t bus ...
Page 12
... TXD pin), is immediately reset if the microcontroller sets the EN pin to high (see Figure 4-2 on page 8 wake-up source flag is stored and signalled in Fail-safe Mode at the TXD pin. Atmel ATA6622/ATA6624/ATA6626 12 ) and a rising edge at pin LIN result in a remote wake-up request. The BUS ) results in a local wake-up request ...
Page 13
... Atmel ATA6622/ATA6624). Figure 5-2 on page 14 . Due to BUS_lim , and the LIN output is switched LINoff , switches the output on again. RXD hys . This is optimal Batt . Because of VCClim , the VCC VCCoff , switches the output hys , which is VCC the safe operating area of the Atmel 13 ...
Page 14
... Figure 5-1. Figure 5-2. For programming purposes of the microcontroller it is potentially necessary to supply the V output via an external power supply while the V This will not affect the system basis chip. Atmel ATA6622/ATA6624/ATA6626 14 VCC Voltage Regulator: Ramp-up and Undervoltage Detection VS 12V 5.5V/3.8V VCC 5V/3 ...
Page 15
... If the triggering signal fails in this open window t the NRES output will be drawn to ground. A triggering signal during the closed window t immediately switches NRES to low. 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 > 200ns triggering signal is not received, a reset signal will be generated at output starts with the negative edge of the RXD output. d ...
Page 16
... A microcontroller with an oscillator tolerance of ±15% is sufficient to supply the trigger inputs correctly. Table 6-1. R WD_OSC 120 Atmel ATA6622/ATA6624/ATA6626 16 Timing Sequence with R Undervoltage Reset t = 4ms reset t = 155ms d t trig = 51k WD_OSC is between the maximum 0 16.5ms 1.2 ...
Page 17
... Junction temperature Storage temperature 8. Thermal Characteristics Parameters Thermal resistance junction to heat slug Thermal resistance junction to ambient, where heat slug is soldered to PCB Thermal shutdown of VCC regulator Thermal shutdown of LIN output Thermal shutdown hysteresis 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 Symbol Min. Typ. V –0 – ...
Page 18
... TXD Input/Output Pin 3.1 Low-level voltage input 3.2 High-level voltage input 3.3 Pull-up resistor V High-level leakage 3.4 V current *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6622/ATA6624/ATA6626 18 Pin VS > V – 0.5V VS LIN S < 14V (T = 25° > V – 0.5V ...
Page 19
... Driver dominant voltage R V 8.3 Driver dominant voltage R V 8.4 Driver dominant voltage R V 8.5 Driver dominant voltage R *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 Pin = V LIN S TXD = 0V WAKE = 0.4V TXD ...
Page 20
... V hysteresis Pre_Wake detection LIN 9.5 High-level input voltage Pre_Wake detection LIN 9.6 Activates the LIN receiver Low-level input voltage *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6622/ATA6624/ATA6626 20 Pin LIN slave LIN = 10mA LIN LIN I BUS_PAS_dom ...
Page 21
... TH TH 10.8 Duty cycle Bit 10.9 Duty cycle Bit Slope time falling and 10.10 V rising edge at LIN *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 Pin = 0V LIN LIN = TXD TXD = 0.744 V Rec(max 0.581 ...
Page 22
... V V 15.3 KL_15 pull-down current V 15.4 Internal debounce time Without external capacitor 15.5 KL_15 wake-up time R *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6622/ATA6624/ATA6626 22 Pin = 20pF RXD = 7.0V to 18V S RXD = max rx_pdr rx_pdf = 7.0V to 18V ...
Page 23
... V Hysteresis of Referred to VCC 17.11 undervoltage threshold V Ramp-up time V > 17. 3. load *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 Pin WAKE WAKE < 27V S WAKE = 0V WAKE = 27V S WAKE = 27V WAKE = 0V WAKE WAKE < 18V S VCC < ...
Page 24
... Referred to VCC 18.11 threshold V Hysteresis of Referred to VCC 18.12 undervoltage threshold V Ramp-up time V > 5. 18. load *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6622/ATA6624/ATA6626 24 Pin < 18V S VCC < 18V S VCC < 5.5V VCC S > –20mA VCC > –50mA VCC > ...
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... TH Rec(max Dom(max) (Transceiver supply of transmitting node) TH Rec(min) TH Dom(min) RXD (Output of receiving node1) t rx_pdf(1) RXD (Output of receiving node2) 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 t t Bit Bit t Bus_dom(max) LIN Bus Signal t Bus_dom(min) t rx_pdr(2) t Bit t Bus_rec(min) Thresholds of receiving node1 Thresholds of receiving node2 ...
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... Figure 9-2. Typical Application Circuit V Battery KL30 + 100nF 10µ Microcontroller EN NTRIG RXD TXD RESET GND Atmel ATA6622/ATA6624/ATA6626 26 22µF 100nF + 10k ATA6622/24/26 2 10k NTRIG MLP 5mm x 5mm 3 0.65mm pitch 33k WAKE 20 lead 4 GND 5 Wake switch Ignition KL15 47k Master node pull-up ...
Page 27
... Battery KL30 + 100nF 10µ Microcontroller EN NTRIG RXD TXD RESET GND *) Note that the output voltage PVCC is no longer short-ciruit protected when boosting the output current by an external NPN-transistor. 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 *) 22µF 100nF + + 2.2µF 3.3 10k ATA6622/24/26 2 10k ...
Page 28
... Figure 9-4. LIN Slave Application with Minimum External Devices VBAT C5 100nF VCC Microcontroller EN NTRIG RXD TXD RESET GND Atmel ATA6622/ATA6624/ATA6626 22µF/50V VCC 10µF 100nF GND 2 NTRIG ATA6622/24/26 VCC 3 WAKE 4 GND Note: No watchdog, INH output not used, no local wake- MODE WD_OSC 13 NRES ...
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... Ordering Information Extended Type Number ATA6622-PGPW ATA6624-PGPW ATA6622-PGQW ATA6624-PGQW ATA6626-PGQW ATA6622C-PGPW ATA6624C-PGPW ATA6622C-PGQW ATA6624C-PGQW ATA6626C-PGQW 11. Package Information Package: VQFN_5 x 5_20L Exposed pad 3.1 x 3.1 Dimensions in mm Not indicated tolerances ±0.05 Pin 1 identification Drawing-No.: 6.543-5129.01-4 Issue: 2; 09.02.07 4986J–AUTO–03/11 Atmel ATA6622/ATA6624/ATA6626 ...
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... Section 7 “Absolute Maximum Ratings” on page 17 changed Section 9 “Electrical Characteristics” on pages changed Section 6 “Watchdog” on pages changed New Part numbers ATA6622C, ATA6624C and ATA6626C added Features on page 1 changed Pin Description table: rows Pin 4 and Pin 15 changed Text under headings 3.3, 3.9, 3.11, 5.5 and 6 changed Figures 4-5, 6-1 and 9-3 changed Abs.Max.Rat.Table -> ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellec- tual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICU- LAR PURPOSE, OR NON-INFRINGEMENT ...