PIC16F716-I/SS Microchip Technology Inc., PIC16F716-I/SS Datasheet

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PIC16F716-I/SS

Manufacturer Part Number
PIC16F716-I/SS
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 13 I/O, SSOP-20
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F716-I/SS

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin SSOP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F716-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F716
Data Sheet
8-bit Flash-based Microcontroller
with A/D Converter and
Enhanced Capture/Compare/PWM
© 2007 Microchip Technology Inc.
DS41206B

Related parts for PIC16F716-I/SS

PIC16F716-I/SS Summary of contents

Page 1

... Flash-based Microcontroller Enhanced Capture/Compare/PWM © 2007 Microchip Technology Inc. PIC16F716 Data Sheet with A/D Converter and DS41206B ...

Page 2

... MCUs and dsPIC EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified logo, microID, MPLAB, PIC DSCs code hopping devices, Serial ® ® © 2007 Microchip Technology Inc. ® ...

Page 3

... Memory Device Flash Data PIC16F716 2048 x 14 128 x 8 © 2007 Microchip Technology Inc. PIC16F716 Low-Power Features: • Standby Current: - 100 nA @ 2.0V, typical • Operating Current μ kHz, 2.0V, typical - 120 μ MHz, 2.0V, typical • Watchdog Timer Circuit μA @ 2.0V, typical • ...

Page 4

... PIC16F716 18-Pin Diagram 18-pin PDIP, SOIC RA2/AN2 RA3/AN3/V RA4/T0CKI MCLR/V RB0/INT/ECCPAS2 RB1/T1OSO/T1CKI RB2/T1OSI RB3/CCP1/P1A TABLE 1: 18-PIN PDIP, SOIC SUMMARY I/O Pin Analog RA0 17 AN0 RA1 18 AN1 RA2 1 AN2 RA3 2 AN3/V REF RA4 3 — RB0 6 — RB1 7 — RB2 8 — RB3 9 — ...

Page 5

... IOC — — — — — — — — — — — — — — — — — — — — — PIC16F716 DD DD Pull-ups Basic — — — — — — — — — — Y — Y — Y — Y — ...

Page 6

... PIC16F716 Table of Contents 1.0 Device Overview .......................................................................................................................................................................... 5 2.0 Memory Organization ................................................................................................................................................................... 7 3.0 I/O Ports ..................................................................................................................................................................................... 19 4.0 Timer0 Module ........................................................................................................................................................................... 27 5.0 Timer1 Module with Gate Control............................................................................................................................................... 29 6.0 Timer2 Module ........................................................................................................................................................................... 35 7.0 Analog-to-Digital Converter (ADC) Module ................................................................................................................................ 37 8.0 Enhanced Capture/Compare/PWM Module ............................................................................................................................... 47 9.0 Special Features of the CPU ...................................................................................................................................................... 61 10.0 Instruction Set Summary ............................................................................................................................................................ 77 11 ...

Page 7

... DEVICE OVERVIEW This document contains device specific information for the PIC16F716. Figure 1-1 is the block diagram for the PIC16F716 device. The pinouts are listed in Table 1-1. FIGURE 1-1: PIC16F716 BLOCK DIAGRAM Flash Program Memory Program 14 Bus Instruction Reg Instruction Decode and ...

Page 8

... PIC16F716 TABLE 1-1: PIC16F716 PINOUT DESCRIPTION Name Function Input Type Output Type MCLR/V MCLR OSC1/CLKIN OSC1 CLKIN CLKIN OSC2/CLKOUT OSC2 CLKOUT RA0/AN0 RA0 AN0 RA1/AN1 RA1 AN1 RA2/AN2 RA2 AN2 RA3/AN3/V RA3 REF AN3 V REF RA4/T0CKI RA4 T0CKI RB0/INT/ECCPAS2 RB0 INT ...

Page 9

... Program Memory Organization The PIC16F716 has a 13-bit program counter capable of addressing program memory space. The PIC16F716 has words of program memory. Accessing a location above the physically implemented address will cause a wrap-around. The Reset vector is at 0000h and the interrupt vector is at 0004h. ...

Page 10

... PIC16F716 2.2.1 GENERAL PURPOSE REGISTER FILE The register file can be accessed either directly or indirectly through the File Select Register FSR (Section 2.5 “Indirect Addressing, INDF and FSR Registers”). DS41206B-page 8 FIGURE 2-2: REGISTER FILE MAP File Address (1) (1) 00h INDF INDF ...

Page 11

... The IRP and RP1 bits are reserved. Always maintain these bits clear any device Reset, these pins are configured as inputs. 6: This is the value that will be in the PORT output latch. 7: Reserved bits, do not use. 8: ECCPAS1 bit is not used on PIC16F716. © 2007 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 RP0 TO ...

Page 12

... PIC16F716 TABLE 2-2: SPECIAL FUNCTION REGISTER SUMMARY BANK 1 Address Name Bit 7 Bit 6 (1) 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 81h OPTION_REG RBPU INTEDG (1) 82h PCL Program Counter’s (PC) Least Significant Byte (1) (4) (4) 83h ...

Page 13

... bits from the STATUS register. For other instructions, not affecting any Status bits, see the “Instruction Set Summary.” Note 1: The PIC16F716 does not use bits IRP and RP1 of the STATUS register. Main- tain these bits clear to ensure upward compatibility with future products ...

Page 14

... PIC16F716 2.2.2.2 OPTION Register The OPTION register is a readable and writable regis- ter, which contains various control bits to configure the TMR0 prescaler/WDT postscaler (single assignable register known also as the prescaler), the External INT Interrupt, TMR0 and the weak pull-ups on PORTB. REGISTER 2-2: ...

Page 15

... GIE of the INTCON register. User software appropriate interrupt flag bits are clear prior to enabling an interrupt. R/W-0 R/W-0 R/W-0 (1) (2) INTE RBIE T0IF U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared (1) (2) PIC16F716 should ensure the R/W-0 R/W-x INTF RBIF bit Bit is unknown DS41206B-page 13 ...

Page 16

... PIC16F716 2.2.2.4 PIE1 Register This register contains the individual enable bits for the peripheral interrupts. REGISTER 2-4: PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1 U-0 R/W-0 U-0 — ADIE — bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 Unimplemented: Read as ‘ ...

Page 17

... GIE of the INTCON register. User software appropriate interrupt flag bits are clear prior to enabling an interrupt. R/W-0 R/W-0 U-0 — — CCP1IF U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared PIC16F716 should ensure the R/W-0 R/W-0 TMR2IF TMR1IF bit Bit is unknown DS41206B-page 15 ...

Page 18

... PIC16F716 2.2.2.6 PCON Register The Power Control (PCON) register contains a flag bit to allow differentiation between a Power-on Reset (POR external MCLR Reset or WDT Reset. These devices contain an additional bit to differentiate a Brown-out Reset condition from a Power-on Reset condition. REGISTER 2-6: PCON: POWER CONTROL REGISTER ...

Page 19

... PCLATH is not modified when the stack is PUSHed or POPed. After the stack has been PUSHed 8 times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on). PIC16F716 LOADING DIFFERENT SITUATIONS PCL 0 Instruction with ...

Page 20

... EXAMPLE 2-2: MOVLW MOVWF NEXT CLRF INCF BTFSS GOTO CONTINUE : An effective 9-bit address is obtained by concatenating the 8-bit FSR register and the IRP bit of the STATUS register, as shown in Figure 2-4. However, IRP is not used in the PIC16F716. 0 IRP (2) bank select 80h 100h 180h (3) ...

Page 21

... The user must ensure the bits in the TRISA register are maintained set when using them as analog inputs. Note: Setting RA3:0 to output while in Analog mode will force pins to output contents of data latch. © 2007 Microchip Technology Inc. PIC16F716 EXAMPLE 3-1: INITIALIZING PORTA BCF STATUS, RP0 ; CLRF PORTA ...

Page 22

... PIC16F716 FIGURE 3-2: BLOCK DIAGRAM OF RA4/T0CKI PIN Data Latch DATA Q D BUS PORT N TRIS Latch Schmitt TRIS CK Q Trigger Input Buffer RD TRIS PORT Timer0 Clock Input TABLE 3-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 PORTA — — — ...

Page 23

... RBIF to be cleared. The interrupt-on-change feature is recommended for wake-up on key depression operation and operations where PORTB is only used for the interrupt-on-change feature. Polling of PORTB is not recommended while V DD using the interrupt-on-change feature. RB0/ INT/ ECCPAS2 V SS PIC16F716 DS41206B-page 21 ...

Page 24

... PIC16F716 FIGURE 3-4: BLOCK DIAGRAM OF RB1/T1OSO/T1CKI PIN Data Latch DATA BUS PORTB Q CK TRIS Latch TRISB TRISB T1OSCEN RD PORTB T1OSI (From RB2) To Timer1 clock input Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register). ...

Page 25

... Schmitt Trigger Buffer V DD weak P pull-up Data Latch TRIS Latch D Q TTL CK Buffer ST Buffer RD TRIS Latch PORT PORT EN Q3 PIC16F716 V DD RB3/CCP1/P1A RB4/ECCPAS0 V SS Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit of the OPTION register. DS41206B-page 23 ...

Page 26

... PIC16F716 FIGURE 3-8: BLOCK DIAGRAM OF RB5/P1B PIN PWMB(P1B) Enable PWMB(P1B) Data out PWMB(P1B) Auto-shutdown tri-state Data Latch DATA BUS PORTB CK TRIS Latch TRISB TRISB RD PORTB Set RBIF From other RB<7:4> pins Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register). ...

Page 27

... Bit 2 Bit 1 RB4 RB3 RB2 RB1 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 T0SE PSA PS2 PS1 PIC16F716 weak V DD pull-up RB7/P1D V SS TTL Buffer Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit of the OPTION register. ...

Page 28

... PIC16F716 NOTES: DS41206B-page 26 © 2007 Microchip Technology Inc. ...

Page 29

... The incrementing edge is determined by the T0SE bit of the OPTION register. Counter mode is selected by setting the T0CS bit of the OPTION register to ‘1’. 1 Sync 8-bit Prescaler PSA 8 1 PS<2:0> Time-out 0 PSA PIC16F716 Data Bus 8 TMR0 CY Set Flag bit T0IF on Overflow WDT DS41206B-page 27 ...

Page 30

... PIC16F716 4.1.3 SOFTWARE PROGRAMMABLE PRESCALER A single software programmable prescaler is available for use with either Timer0 or the Watchdog Timer (WDT), but not both simultaneously. The prescaler assignment is controlled by the PSA bit of the OPTION register. To assign the prescaler to Timer0, the PSA bit must be cleared to a ‘0’. ...

Page 31

... Timer1 is enabled after POR or BOR Reset • A write to TMR1H or TMR1L • T1CKI is high when Timer1 is disabled and when Timer1 is reenabled T1CKI is low. See Figure 5-2. PIC16F716 Synchronized 0 clock input 1 (3) ...

Page 32

... PIC16F716 5.3 Timer1 Prescaler Timer1 has four prescaler options allowing divisions of the clock input. The T1CKPS bits of the T1CON register control the prescale counter. The prescale counter is not directly readable or writable; however, the prescaler counter is cleared upon a write to TMR1H or TMR1L. 5.4 Timer1 Oscillator A low-power 32 ...

Page 33

... Note 1: Arrows indicate counter increments Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of the clock. © 2007 Microchip Technology Inc. PIC16F716 5.9 ECCP Special Event Trigger If a ECCP is configured to trigger a special event, the trigger will clear the TMR1H:TMR1L register pair. This special event does not cause a Timer1 interrupt ...

Page 34

... PIC16F716 5.10 Timer1 Control Register The Timer1 Control register (T1CON), shown in Register 5-1, is used to control Timer1 and select the various features of the Timer1 module. REGISTER 5-1: T1CON: TIMER 1 CONTROL REGISTER U-0 U-0 R/W-0 — — T1CKPS1 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘ ...

Page 35

... Bit 2 Bit 1 INTE RBIE T0IF INTF — — CCP1IE TMR2IE — — CCP1IF TMR2IF T1CKPS0 T1OSCEN T1SYNC TMR1CS PIC16F716 Value on Value on Bit 0 all other POR, BOR Resets RBIF 0000 000x 0000 000x TMR1IE -0-- -000 -0-- -000 TMR1IF -0-- -000 -0-- -000 xxxx xxxx uuuu uuuu ...

Page 36

... PIC16F716 NOTES: DS41206B-page 34 © 2007 Microchip Technology Inc. ...

Page 37

... A write to T2CON occurs. • Any device Reset occurs (Power-on Reset, MCLR Reset, Watchdog Timer Reset, or Brown-out Reset). Note: TMR2 is not cleared when T2CON is written. TMR2 Output Reset TMR2 Postscaler Comparator 1 PR2 TOUTPS<3:0> PIC16F716 Sets Flag bit TMR2IF DS41206B-page 35 ...

Page 38

... PIC16F716 REGISTER 6-1: T2CON: TIMER 2 CONTROL REGISTER U-0 R/W-0 R/W-0 — TOUTPS3 TOUTPS2 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 Unimplemented: Read as ‘0’ bit 6-3 TOUTPS<3:0>: Timer2 Output Postscaler Select bits 0000 = 1:1 Postscaler ...

Page 39

... The ADC can generate an interrupt upon completion of a conversion. This interrupt can be used to wake-up the device from Sleep. Figure 7-1 shows the block diagram of the ADC PFCG<2:0> (ADCON1 register) V REF 000 001 ADC 010 GO/DONE 011 CHS ADON V SS PIC16F716 8 ADRES DS41206B-page 37 ...

Page 40

... PIC16F716 7.1 ADC Configuration When configuring and using the ADC the following functions must be considered: • Port configuration • Channel selection • ADC voltage reference selection • ADC conversion clock source • Interrupt control 7.1.1 PORT CONFIGURATION The ADC can be used to convert both analog and digital signals ...

Page 41

... If the user is attempting to wake-up from Sleep and resume in-line code execution, the global interrupt must be disabled. If the global interrupt is enabled, execution will switch to the Interrupt Service Routine. Please see Section 7.1.5 “Interrupts” for more information. © 2007 Microchip Technology Inc. PIC16F716 DS41206B-page 39 ...

Page 42

... PIC16F716 7.2 ADC Operation 7.2.1 STARTING A CONVERSION To enable the ADC module, the ADON bit of the ADCON0 register must be set to a ‘1’. Setting the GO/ DONE bit of the ADCON0 register to a ‘1’ will start the Analog-to-Digital conversion. Note: The GO/DONE bit should not be set in the same instruction that turns on the ADC. Refer to Section 7.2.6 “ ...

Page 43

... ADON: ADC Enable bit 1 = ADC is enabled 0 = ADC is disabled and consumes no operating current © 2007 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 CHS1 CHS0 GO/DONE U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared PIC16F716 U-0 R/W-0 — ADON bit Bit is unknown DS41206B-page 41 ...

Page 44

... PIC16F716 REGISTER 7-2: ADCON1: A/D CONTROL REGISTER 1 U-0 U-0 U-0 — — — bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-3 Unimplemented: Read as ‘0’ bit 2-0 PCFG<2:0>: A/D Port Configuration Control bits. The following table illustrates the effects of the various configurations: ...

Page 45

... Ω Ω 10k ln(0.0004885 0.05μ 50°C- 25°C /° has no effect on the equation, since it cancels itself out not discharged after each conversion. HOLD PIC16F716 Ω 5. Temperature Coefficient charged to within 1/2 lsb CHOLD charge response to V CHOLD APPLIED DS41206B-page 43 ...

Page 46

... PIC16F716 FIGURE 7-2: ANALOG INPUT MODEL ANx Rs C PIN Legend Input Capacitance PIN V = Threshold Voltage Leakage current at the pin due to LEAKAGE various junctions R = Interconnect Resistance Sampling Switch C = Sample/Hold Capacitance HOLD Note 1: See Section 12.0 “Electrical Characteristics”. FIGURE 7-3: ADC TRANSFER FUNCTION ...

Page 47

... INTF — — CCP1IE TMR2IE — — CCP1IF TMR2IF RA4 RA3 RA2 RA1 TRISA4 TRISA3 TRISA2 TRISA1 PIC16F716 Value on Value on Bit 0 all other POR, BOR Resets ADON 0000 0000 0000 0000 PCFG0 ---- -000 ---- -000 xxxx xxxx uuuu uuuu RBIF 0000 000x ...

Page 48

... PIC16F716 NOTES: DS41206B-page 46 © 2007 Microchip Technology Inc. ...

Page 49

... ECCP MODE – TIMER RESOURCES REQUIRED ECCP Mode Capture Compare PWM R/W-0 R/W-0 R/W-0 DC1B0 CCP1M3 CCP1M2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared PIC16F716 CCP1 throughout this Timer Resource Timer1 Timer1 Timer2 R/W-0 R/W-0 CCP1M1 CCP1M0 bit Bit is unknown ...

Page 50

... PIC16F716 8.1 Capture Mode In Capture mode, CCPR1H:CCPR1L captures the 16-bit value of the TMR1 register when an event occurs on pin CCP1. An event is defined as one of the following and is configured by the CCP1M<3:0> bits of the CCP1CON register: • Every falling edge • Every rising edge • Every 4th rising edge • ...

Page 51

... INTE RBIE T0IF INTF — — CCP1IE TMR2IE — — CCP1IF TMR2IF TRISB4 TRISB3 TRISB2 TRISB1 PIC16F716 Value on Value on Bit 0 all other POR, BOR Resets xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx CCP1M0 0000 0000 0000 0000 RBIF 0000 000x ...

Page 52

... PIC16F716 8.2 Compare Mode In Compare mode, the 16-bit CCPR1 register value is constantly compared against the TMR1 register pair value. When a match occurs, the CCP1 module may: • Toggle the CCP1 output. • Set the CCP1 output. • Clear the CCP1 output. ...

Page 53

... INTE RBIE T0IF INTF — — CCP1IE TMR2IE — — CCP1IF TMR2IF TRISB4 TRISB3 TRISB2 TRISB1 PIC16F716 Value on Value on Bit 0 all other POR, BOR Resets xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx CCP1M0 0000 0000 0000 0000 RBIF 0000 000x ...

Page 54

... PIC16F716 8.3 PWM Mode The PWM mode generates a Pulse-Width Modulated signal on the CCP1 pin. The duty cycle, period and resolution are determined by the following registers: • PR2 • T2CON • CCPR1L • CCP1CON In Pulse-Width Modulation (PWM) mode, the CCP module produces 10-bit resolution PWM output on the CCP1 pin ...

Page 55

... The system clock is used if the Timer2 prescaler is set to 1:1. When the 10-bit time base matches the CCPR1H and 2- bit latch, then the CCP1 pin is cleared (see Figure 8-3). PIC16F716 PULSE WIDTH • CCPR1L:CCP1CON< ...

Page 56

... PIC16F716 8.3.3 PWM RESOLUTION The resolution determines the number of available duty cycles for a given period. For example, a 10-bit resolution will result in 1024 discrete duty cycles, whereas an 8-bit resolution will result in 256 discrete duty cycles. The maximum PWM resolution is 10 bits when PR2 is 255 ...

Page 57

... EFFECTS OF RESET Any Reset will force all ports to Input mode and the CCP registers to their Reset states. © 2007 Microchip Technology Inc. PIC16F716 8.3.7 SETUP FOR PWM OPERATION The following steps should be taken when configuring the CCP module for PWM operation: 1 ...

Page 58

... PIC16F716 8.3.8 ENHANCED PWM AUTO- SHUTDOWN MODE The PWM mode supports an Auto-Shutdown mode that will disable the PWM outputs when an external shutdown event occurs. Auto-Shutdown mode places the PWM output pins into a predetermined state. This mode is used to help prevent the PWM from damaging the application ...

Page 59

... PWM signal will always restart at the beginning of the next PWM period. © 2007 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 ECCPAS0 PSSAC1 PSSAC0 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared condition PIC16F716 R/W-0 R/W-0 PSSBD1 PSSBD0 bit Bit is unknown DS41206B-page 57 ...

Page 60

... PIC16F716 FIGURE 8-6: PWM AUTO-SHUTDOWN WITH FIRMWARE RESTART (PRSEN = 0) Shutdown Event ECCPASE bit PWM Activity Start of PWM Period 8.3.9 AUTO-RESTART MODE The Enhanced PWM can be configured to automati- cally restart the PWM signal once the auto-shutdown condition has been removed. Auto-restart is enabled by setting the PRSEN bit in the PWM1CON register ...

Page 61

... Pulse Width (2) P1A td (2) P1B ( Dead-Band Delay Note 1: At this time, the TMR2 register is equal to the PR2 register. 2: Output signals are shown as active-high OSC V+ FET Driver P1A FET Driver P1B V- PIC16F716 EXAMPLE OF HALF- BRIDGE PWM OUTPUT Period Period td (1) ( Load + V - DS41206B-page 59 ...

Page 62

... PIC16F716 REGISTER 8-3: PWM1CON: ENHANCED PWM CONTROL REGISTER R/W-0 R/W-0 R/W-0 PRSEN PDC6 PDC5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 PRSEN: PWM Restart Enable bit 1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes away ...

Page 63

... SPECIAL FEATURES OF THE CPU The PIC16F716 device has a host of features intended to maximize system reliability, minimize cost through elimination of external components, power-saving operating modes and offer code protection. These are: • OSC Selection • Reset - Power-on Reset (POR) - Power-up Timer (PWRT) ...

Page 64

... PIC16F716 REGISTER 9-1: CONFIG: CONFIGURATION WORD REGISTER — — CP bit 15 (1) BORV BOREN — bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 15-14 Unimplemented: Read as ‘1’ bit 13 CP: Code Protection bit 1 = Program memory code protection is disabled ...

Page 65

... Oscillator Configurations 9.2.1 OSCILLATOR TYPES The PIC16F716 can be operated in four different oscillator modes. The user can program two Configura- tion bits (FOSC1 and FOSC0) to select one of these four modes: • LP – Low-power Crystal • XT – Crystal/Resonator • HS – High-speed Crystal/Resonator • ...

Page 66

... C values. The user also needs to EXT take into account variation due to tolerance of external R and C components used. Figure 9-3 shows how the R/C combination is connected to the PIC16F716. FIGURE 9-3: RC OSCILLATOR MODE EXT ...

Page 67

... Microchip Technology Inc. PIC16F716 9.7 Programmable Brown-Out Reset (PBOR) The PIC16F716 has on-chip Brown-out Reset circuitry. A Configuration bit, BOREN, can disable (if clear/pro- grammed) or enable (if set) the Brown-out Reset circuitry. The BORV Configuration bit selects the programmable Brown-out Reset threshold voltage (V BORV ...

Page 68

... PIC16F716 FIGURE 9-5: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT External Reset MCLR Sleep WDT WDT Module Time-out Reset V rise DD detect Power-on Reset V DD Brown-out Reset BOREN OST/PWRT OST 10-bit Ripple counter OSC1 (1) PWRT On-chip 10-bit Ripple counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN ...

Page 69

... Microchip Technology’s MCP809 microcontroller supervisor. The MCP8XX and MCP1XX families of supervisors provide push-pull and open collector outputs with both high and low active Reset pins. There are 7 different trip point selections to accommodate 5V and 3V systems. DD PIC16F716 EXTERNAL BROWN-OUT PROTECTION CIRCUIT MCLR PIC16F716 DS41206B-page 67 ...

Page 70

... Then bringing MCLR high will begin execution immediately (Figure 9-12). This is useful for testing purposes or to synchronize more than one PIC16F716 device operating in parallel. Table 9-5 shows the Reset conditions for some Special Function Registers, while Table 9-6 shows the Reset conditions for all the registers ...

Page 71

... Interrupt wake-up from Sleep Legend unchanged unknown unimplemented bit read as ‘0’. Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). © 2007 Microchip Technology Inc. PIC16F716 Program STATUS Counter Register 000h ...

Page 72

... PIC16F716 TABLE 9-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS OF THE PIC16F716 Power-on Reset, Register Brown-out Reset W xxxx xxxx INDF N/A TMR0 xxxx xxxx PCL 0000h STATUS 0001 1xxx FSR xxxx xxxx (4), (5), (6) PORTA --xx 0000 (4), (5) PORTB xxxx xxxx PCLATH ---0 0000 INTCON 0000 -00x ...

Page 73

... DD MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-12: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET © 2007 Microchip Technology Inc. PIC16F716 DD T PWRT T OST T PWRT T OST T PWRT T OST ) ): CASE 1 DD ...

Page 74

... PIC16F716 9.10 Interrupts The PIC16F716 devices have sources of interrupt. The Interrupt Control Register (INTCON) records individual interrupt requests in flag bits. It also has individual and global interrupt enable bits. Note: Individual interrupt flag bits are set regard- less of the status of their corresponding mask bit or the GIE bit ...

Page 75

... FSR to W ;Copy FSR from W to FSR_TEMP ;Restore FSR ;Move W into FSR ;Restore PCLATH ;Move W into PCLATH ;Swap STATUS_TEMP register into W ;Move W into STATUS register ;Swap W_TEMP ;Swap W_TEMP into W ;Return from interrupt and enable GIE PIC16F716 PCLATH_TEMP and DS41206B-page 73 ...

Page 76

... PIC16F716 9.12 Watchdog Timer (WDT) The Watchdog Timer is a free running, on-chip, RC oscillator which does not require any external components. This RC oscillator is separate from the RC oscillator of the OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the OSC1/CLKIN and OSC2/CLKOUT pins of the device have been stopped, for example, by execution of a SLEEP instruction ...

Page 77

... SLEEP instruction, it may be possible for flag bits to become set before the SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruction should be executed before a SLEEP instruction. PIC16F716 DS41206B-page 75 ...

Page 78

... Inst( Dummy cycle Inst( 9.16 In-Circuit Serial Programming™ PIC16F716 microcontrollers programmed while in the end application circuit. This is simply done with two lines for clock and data, and three other lines for power, ground and the programming voltage. This allows customers to manufacture boards with unprogrammed devices and then program the microcontroller just before shipping the product ...

Page 79

... INSTRUCTION SET SUMMARY The PIC16F716 instruction set is highly orthogonal and is comprised of three basic categories: • Byte-oriented operations • Bit-oriented operations • Literal and control operations Each PIC16 instruction is a 14-bit word divided into an opcode, which specifies the instruction type and one or more operands, which further specify the operation of the instruction ...

Page 80

... PIC16F716 TABLE 10-2: PIC16F716 INSTRUCTION SET Mnemonic, Description Operands BYTE-ORIENTED FILE REGISTER OPERATIONS ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW – Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ ...

Page 81

... Operands: Operation: Status Affected: Description: BTFSC Syntax: k Operands: Operation: Status Affected: Description: f,d PIC16F716 Bit Clear f [ label ] BCF f,b 0 ≤ f ≤ 127 0 ≤ b ≤ → (f<b>) None Bit ‘b’ in register ‘f’ is cleared. Bit Set f [ label ] BSF f,b 0 ≤ f ≤ 127 0 ≤ ...

Page 82

... PIC16F716 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b 0 ≤ f ≤ 127 Operands: 0 ≤ b < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘0’, the next instruction is executed. If bit ‘b’ is ‘1’, then the next ...

Page 83

... The contents of register ‘f’ are incremented. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. © 2007 Microchip Technology Inc. PIC16F716 INCFSZ Increment f, Skip if 0 Syntax: [ label ] INCFSZ f,d Operands: 0 ≤ ...

Page 84

... PIC16F716 MOVF Move f Syntax: [ label ] MOVF f,d Operands: 0 ≤ f ≤ 127 d ∈ [0,1] Operation: (f) → (dest) Status Affected: Z Description: The contents of register f is moved to a destination dependent upon the status destination is W register the destination is file register f itself useful to test a file register since status flag Z is affected ...

Page 85

... This is a two-cycle instruction. Words: 1 Cycles: 2 Example: RETFIE After Interrupt PC = TOS GIE = 1 © 2007 Microchip Technology Inc. PIC16F716 RETLW Return with literal in W Syntax: [ label ] RETLW k Operands: 0 ≤ k ≤ 255 Operation: k → (W); TOS → PC Status Affected: None Description: The W register is loaded with the eight bit literal ‘ ...

Page 86

... PIC16F716 RLF Rotate Left f through Carry Syntax: [ label ] RLF f,d 0 ≤ f ≤ 127 Operands: d ∈ [0,1] Operation: See description below Status Affected: C Description: The contents of register ‘f’ are rotated one bit to the left through the Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘ ...

Page 87

... If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed in register ‘f’. © 2007 Microchip Technology Inc. PIC16F716 XORLW Exclusive OR literal with W Syntax: [ label ] XORLW k 0 ≤ k ≤ 255 Operands: (W) .XOR. k → ...

Page 88

... PIC16F716 NOTES: DS41206B-page 86 © 2007 Microchip Technology Inc. ...

Page 89

... MPLAB PM3 Device Programmer - PICkit™ 2 Development Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2007 Microchip Technology Inc. PIC16F716 11.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...

Page 90

... PIC16F716 11.2 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for all PIC MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging ...

Page 91

... Microchip Technology Inc. PIC16F716 11.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, ...

Page 92

... PIC16F716 11.11 PICSTART Plus Development Programmer The PICSTART Plus Development Programmer is an easy-to-use, low-cost, prototype programmer. It connects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus Development Programmer supports most PIC devices in DIP packages pins. ...

Page 93

... Exposure to maximum rating conditions for extended periods may affect device reliability. © 2007 Microchip Technology Inc. (except V , MCLR, and RA4) ....................................... -0. (Note 2) ...................................................................................... 0V to +13.25V )...................................................................................................................± ...........................................................................................................±20 mA > ∑ pin, inducing currents greater than 80 mA, may cause latch-up PIC16F716 +0.3V ∑ {( ∑( pin rather PP DS41206B-page 91 ) ...

Page 94

... V DD (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16F716 VOLTAGE-FREQUENCY GRAPH, 85°C < TA < +125°C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. ...

Page 95

... DC Characteristics: PIC16F716 (Industrial, Extended) DC CHARACTERISTICS Param Sym Characteristic No. V Supply Voltage DD D001 D001A D002* V RAM Data Retention DR (1) Voltage D003 V V Start Voltage to ensure POR DD internal Power-on Reset signal D004 Rise Rate to ensure VDD DD internal Power-on Reset signal D005 V Brown-out Reset voltage trip ...

Page 96

... PIC16F716 12.2 DC Characteristics: PIC16F716 (Industrial) DC CHARACTERISTICS Param Sym Characteristic No. V Supply Voltage DD D001 I Supply Current DD D010 D011 D012 D013 I Power-down Base Current PD D020 Peripheral Module Current D021 D022 D025 † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested ...

Page 97

... DC Characteristics: PIC16F716 (Extended) DC CHARACTERISTICS Param Sym Characteristic No. V Supply Voltage DD D001 I Supply Current DD D010E D011E D012E D013E I Power-down Base Current PD D020E Peripheral Module Current D021E D022E D025E † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested ...

Page 98

... Standard Operating Conditions (unless otherwise stated) -40°C ≤ T Operating temperature -40°C ≤ T Operating voltage V range as described in DC spec Section 12.1 “DC Charac- DD teristics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Character- istics: PIC16F716 (Industrial, Extended)”. Min Typ† Max Units V — ...

Page 99

... Lowercase letters (pp) and their meanings CCP1 ck CLKOUT SDI do SDO dt Data in io I/O port mc MCLR Uppercase letters and their meanings Fall H High I Invalid (High-impedance) L Low © 2007 Microchip Technology Inc. PIC16F716 T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z High-impedance DS41206B-page 97 ...

Page 100

... TEMPERATURE AND VOLTAGE SPECIFICATIONS - AC Standard Operating Conditions (unless otherwise stated) Operating temperature AC CHARACTERISTICS Operating voltage V istics: PIC16F716 (Industrial, Extended)” and Section 12.4 “DC Characteristics: PIC16F716 (Industrial, Extended)”. LC parts operate for commercial/industrial temp’s only. FIGURE 12-3: LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS ...

Page 101

... All specified values PIC16F716 Units Conditions MHz RC and XT Osc modes MHz HS Osc mode kHz LP Osc mode MHz RC Osc mode MHz XT Osc mode MHz HS Osc mode kHz ...

Page 102

... PIC16F716 FIGURE 12-5: CLKOUT AND I/O TIMING Q4 OSC1 CLKOUT I/O Pin (input) I/O Pin old value (output) Note 1: Refer to Figure 12-3 for load conditions. TABLE 12-3: CLKOUT AND I/O TIMING REQUIREMENTS Param Sym Characteristic No. 10 OSC1↑ to CLKOUT↓ 11 OSC1↑ to CLKOUT↑ ...

Page 103

... TBD TBD TBD — 1024 T — OSC 28 72 132 TBD TBD TBD — — 2.1 100 — — PIC16F716 31 34 Conditions μ 5V, -40°C to +125° 5V, -40°C to +85° 5V, +85°C to +125°C DD — OSC1 period OSC 5V, -40°C to +85°C ...

Page 104

... PIC16F716 FIGURE 12-8: TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS T0CKI T1OSO/T1CKI TMR0 or TMR1 Note 1: Refer to Figure 12-3 for load conditions. TABLE 12-5: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS Param Sym Characteristic No. 40* Tt0H T0CKI High Pulse Width 41* Tt0L T0CKI Low Pulse Width ...

Page 105

... Microchip Technology Inc. ( Min Typ† Max Units 0. — — 0. — — — Standard — 10 Extended — — Standard — 10 Extended — — PIC16F716 Conditions — ns — ns — ns — ns — prescale value (1, DS41206B-page 103 ...

Page 106

... PIC16F716 TABLE 12-7: A/D CONVERTER CHARACTERISTICS: PIC16F716 (INDUSTRIAL, EXTENDED) Param Sym Characteristic No. A00 V V Operation DD DD A01 N Resolution R A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 E Full scale error FS A06 E Offset error OFF A10 — ...

Page 107

... Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: ADRES register may be read on the following T 2: See Section 12.1 “DC Characteristics: PIC16F716 (Industrial, Extended)” for min. conditions. © 2007 Microchip Technology Inc. (1) 131 130 ...

Page 108

... PIC16F716 NOTES: DS41206B-page 106 © 2007 Microchip Technology Inc. ...

Page 109

... MHz 2 MHz 4 MHz © 2007 Microchip Technology Inc. vs. F OVER V (EC MODE) OSC DD 6 MHz 8 MHz 10 MHz 12 MHz F OSC PIC16F716 5.5V 5.0V 4.0V 3.0V 2.0V 14 MHz 16 MHz 18 MHz 20 MHz DS41206B-page 107 DD ...

Page 110

... PIC16F716 FIGURE 13-2: MAXIMUM I DD 4.0 Typical: Statistical Mean @25°C Maximum: Mean (Worst-case Temp) + 3σ 3.5 (-40°C to 125°C) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1 MHz 2 MHz 4 MHz FIGURE 13-3: TYPICAL I DD 4.0 Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-case Temp) + 3σ ...

Page 111

... Microchip Technology Inc. vs. F OVER V (HS MODE) OSC DD Maximum IDD vs. FOSC Over Vdd HS Mode 4.0V 3.5V 3.0V 10 MHz 16 MHz F OSC vs. V OVER F (XT MODE) DD OSC XT Mode 4 MHz 1 MHz 3.0 3.5 4.0 V (V) DD PIC16F716 5.5V 5.0V 4.5V 20 MHz 4.5 5.0 5.5 DS41206B-page 109 ...

Page 112

... PIC16F716 FIGURE 13-6: MAXIMUM I DD 1,400 Typical: Statistical Mean @25°C 1,200 Maximum: Mean (Worst-case Temp) + 3σ (-40°C to 125°C) 1,000 800 600 400 200 0 2.0 2.5 FIGURE 13-7: TYPICAL I DD 800 Typical: Statistical Mean @25°C Maximum: Mean (Worst-case Temp) + 3σ 700 (-40° ...

Page 113

... Maximum: Mean (Worst-case Temp) + 3σ 60 (-40°C to 125° 2.0 2.5 © 2007 Microchip Technology Inc. vs. V (EXTRC MODE) DD EXTRC Mode 4 MHz 1 MHz 3.0 3.5 4 kHz Maximum 32 kHz Typical 3.0 3.5 4.0 V (V) DD PIC16F716 4.5 5.0 5.5 4.5 5.0 5.5 DS41206B-page 111 ...

Page 114

... PIC16F716 FIGURE 13-10: TYPICAL I PD 0.45 Typical: Statistical Mean @25°C 0.40 Maximum: Mean (Worst-case Temp) + 3σ (-40°C to 125°C) 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.0 2.0 2.5 FIGURE 13-11: MAXIMUM I PD 18.0 Typical: Statistical Mean @25°C Maximum: Mean + 3σ ...

Page 115

... Microchip Technology Inc. OVER TEMPERATURE DD Maximum Typical 3.5 4.0 4.5 V (V) DD vs. V OVER TEMPERATURE PD DD Typical 3.0 3.5 4.0 V (V) DD PIC16F716 5.0 5.5 4.5 5.0 5.5 DS41206B-page 113 ...

Page 116

... PIC16F716 FIGURE 13-14: MAXIMUM WDT I 25.0 20.0 15.0 10.0 5.0 0.0 2.0 2.5 FIGURE 13-15: WDT PERIOD vs Typical: Statistical Mean @25°C Maximum: Mean (Worst-case Temp) + 3σ 28 (-40°C to 125° 2.0 2.5 DS41206B-page 114 vs. V OVER TEMPERATURE PD DD Maximum Max. 125°C Maximum: Mean (Worst-case Temp) + 3σ ...

Page 117

... FIGURE 13-16: WDT PERIOD vs. TEMPERATURE OVER V 30 Typical: Statistical Mean @25°C 28 Maximum: Mean (Worst-case Temp) + 3σ (-40°C to 125° -40°C © 2007 Microchip Technology Inc. (5.0V) DD Vdd = 5V Maximum Typical Minimum 25°C 85°C Temperature (°C) PIC16F716 125°C DS41206B-page 115 ...

Page 118

... PIC16F716 FIGURE 13-17: V vs. I OVER TEMPERATURE ( 0.8 Typical: Statistical Mean @25°C 0.7 Maximum: Mean (Worst-case Temp) + 3σ (-40°C to 125°C) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 5.0 5.5 6.0 FIGURE 13-18: V vs. I OVER TEMPERATURE ( 0.45 Typical: Statistical Mean @25°C 0.40 Typical: Statistical Mean @25× ...

Page 119

... Microchip Technology Inc. = 3.0V) DD -1.5 -2.0 -2.5 I (mA 5.0V -1.5 -2.0 -2.5 -3.0 -3.5 I (mA) OH PIC16F716 Max. -40°C Typ. 25°C Min. 125°C -3.0 -3.5 -4.0 Max. -40°C Typ. 25°C Min. 125°C -4.0 -4.5 -5.0 DS41206B-page 117 ...

Page 120

... PIC16F716 FIGURE 13-21: TTL INPUT THRESHOLD V 1.7 Typical: Statistical Mean @25°C 1.5 Maximum: Mean (Worst-case Temp) + 3σ (-40°C to 125°C) 1.3 1.1 0.9 0.7 0.5 2.0 2.5 FIGURE 13-22: SCHMITT TRIGGER INPUT THRESHOLD V 4.0 Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-case Temp) + 3σ ...

Page 121

... OVER TEMPERATURE (32 kHz) DD Max. 125°C Max. 85°C Typ. 25°C 3.0 3.5 4.0 V (V) DD OVER TEMPERATURE DD Typical: Statistical Mean @25°C Maximum: Mean (Worst-case Temp) + 3σ (-40°C to 125°C) 3.0 3.5 4.0 4.5 V (V) DD PIC16F716 4.5 5.0 5.5 5.0 5.5 DS41206B-page 119 ...

Page 122

... PIC16F716 NOTES: DS41206B-page 120 © 2007 Microchip Technology Inc. ...

Page 123

... Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2007 Microchip Technology Inc. PIC16F716 Example PIC16F716-04 0610017 Example PIC16F716-20 / 0610017 Example PIC16F716 -20I/SS025 0610017 ) e 3 DS41206B-page 121 ...

Page 124

... PIC16F716 14.2 Package Details The following sections give the technical details of the packages. 18-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE Number of Pins ...

Page 125

... BSC D 11.55 BSC h 0.25 – L 0.40 – L1 1.40 REF φ 0° – c 0.20 – b 0.31 – α 5° – β 5° – Microchip Technology Drawing C04-051B PIC16F716 c MAX 2.65 – 0.30 0.75 1.27 8° 0.33 0.51 15° 15° DS41206B-page 123 ...

Page 126

... PIC16F716 20-Lead Plastic Shrink Small Outline (SS) – 5.30 mm Body [SSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N NOTE Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width ...

Page 127

... Updated with current formats and added Characterization Data. Replaced Package Drawings. © 2007 Microchip Technology Inc. PIC16F716 APPENDIX B: CONVERSION CONSIDERATIONS This is a Flash program memory version of the PIC16C716 device. Refer to the migration document, DS40059, for more information about differences between the PIC16F716 and PIC16C716. DS41206B-page 125 ...

Page 128

... BORV. Brown-out Reset ensures the device is placed in a Reset condition fixed setpoint. DS41206B-page 126 To convert code written for PIC16C5X to PIC16F716, the user should take the following steps: 1. Remove any program memory page select operations (PA2, PA1, PA0 bits) for CALL, GOTO. ...

Page 129

... Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com PIC16F716 should contact their distributor, DS41206B-page 127 ...

Page 130

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16F716 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

Page 131

... MPASM Assembler..................................................... 88 B Banking, Data Memory ......................................................... 7 Block Diagrams (CCP) Capture Mode Operation ................................. 48 ADC ............................................................................ 37 ADC Transfer Function ............................................... 44 Analog Input Model ..................................................... 44 Auto-Shutdown ........................................................... 56 CCP PWM................................................................... 52 Compare ..................................................................... 50 Interrupt Sources ........................................................ 72 On-Chip Reset Circuit ................................................. 66 PIC16F716.................................................................... 5 PORTA.................................................................. 19, 20 PORTB........................................................................ 21 RB1/T1OSO/T1CKI..................................................... 22 RB2/T1OSI.................................................................. 22 RB3/CCP1/P1A........................................................... 23 RB4 ............................................................................. 23 RB5 ............................................................................. 24 RB6/P1C ..................................................................... 24 RB7/P1D ..................................................................... 25 Timer1......................................................................... 29 Timer2......................................................................... 35 TMR0/WDT Prescaler................................................. 27 Watchdog Timer (WDT) ...

Page 132

... PIC16F716 E ECCP. See Enhanced Capture/Compare/PWM ECCPAS Register ............................................................... 57 Effects of Reset PWM mode ................................................................. 55 Electrical Characteristics..................................................... 91 Enhanced Capture/Compare/PWM..................................... 47 Enhanced Capture/Compare/PWM (ECCP) Enhanced PWM Mode Auto-Restart........................................................ 58 Auto-shutdown .................................................... 56 Half-Bridge Application Examples....................... 59 Programmable Dead Band Delay ....................... 59 Shoot-through Current ........................................ 59 Timer Resources......................................................... 47 Errata .................................................................................... 4 External Power-on Reset Circuit ......................................... 64 F Firmware Instructions.......................................................... 77 Fuses ...

Page 133

... T1CON........................................................................ 32 T2CON........................................................................ 36 Reset............................................................................. 61, 64 Brown-out Reset (BOR). See Brown-out Reset (BOR) © 2007 Microchip Technology Inc. PIC16F716 MCLR Reset. See MCLR Power-on Reset (POR). See Power-on Reset (POR) Reset Conditions for PCON Register ......................... 69 Reset Conditions for Program Counter ...................... 69 Reset Conditions for STATUS Register ..................... 69 Timing Diagram ...

Page 134

... PIC16F716 Timing Diagrams and Specifications................................... 98 A/D Conversion ......................................................... 105 Brown-out Reset (BOR) ............................................ 101 Capture/Compare/PWM (CCP)................................. 103 CLKOUT and I/O....................................................... 100 External Clock ............................................................. 98 Oscillator Start-up Timer (OST) ................................ 101 Power-up Timer (PWRT) .......................................... 101 Reset......................................................................... 101 Timer0 and Timer1.................................................... 102 Watchdog Timer (WDT) ............................................ 101 ADC Reference Voltage ...

Page 135

... Examples: Pattern a) b) (2) ; +85°C (Industrial) (Extended) Note 1: PIC16F716 . PIC16F716 - I/L 301 = Industrial temp., PDIP package, QTP pattern #301. PIC16F716 - E/SO = Extended temp., SOIC package Standard Voltage Range LF = Wide Voltage Range tape and reel SOIC and SSOP packages only. DS41206B-page 133 ...

Page 136

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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