DSPIC33FJ128MC706-I/PT Microchip Technology Inc., DSPIC33FJ128MC706-I/PT Datasheet - Page 74

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DSPIC33FJ128MC706-I/PT

Manufacturer Part Number
DSPIC33FJ128MC706-I/PT
Description
16 BIT MCU/DSP 64LD 40MIPS 128KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC33FJ128MC706-I/PT

A/d Inputs
16-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
CAN/I2C/SPI/UART
Ios
53
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
128K Bytes
Ram Size
16K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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dsPIC33F
3.6
The dsPIC33F architecture uses a 24-bit wide program
space and a 16-bit wide data space. The architecture is
also a modified Harvard scheme, meaning that data
can also be present in the program space. To use this
data successfully, it must be accessed in a way that
preserves the alignment of information in both spaces.
Aside from normal execution, the dsPIC33F architec-
ture provides two methods by which program space
can be accessed during operation:
• Using table instructions to access individual bytes
• Remapping a portion of the program space into
Table instructions allow an application to read or write
to small areas of the program memory. This capability
makes the method ideal for accessing data tables that
need to be updated from time to time. It also allows
access to all bytes of the program word. The remap-
ping method allows an application to access a large
block of data on a read-only basis, which is ideal for
look ups from a large table of static data. It can only
access the least significant word of the program word.
TABLE 3-37:
DS70165D-page 72
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
Program Space Visibility
(Block Remap/Read)
Note 1:
or words anywhere in the program space
the data space (Program Space Visibility)
Access Type
Interfacing Program and Data
Memory Spaces
Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
PROGRAM SPACE ADDRESS CONSTRUCTION
User
User
Configuration
User
Access
Space
Preliminary
<23>
0
0
0
TBLPAG<7:0>
TBLPAG<7:0>
0xxx xxxx
1xxx xxxx
0xx
3.6.1
Since the address ranges for the data and program
spaces are 16 and 24 bits, respectively, a method is
needed to create a 23-bit or 24-bit program address
from 16-bit data registers. The solution depends on the
interface method to be used.
For table operations, the 8-bit Table Page register
(TBLPAG) is used to define a 32K word region within
the program space. This is concatenated with a 16-bit
EA to arrive at a full 24-bit program space address. In
this format, the Most Significant bit of TBLPAG is used
to determine if the operation occurs in the user memory
(TBLPAG<7> = 0) or the configuration memory
(TBLPAG<7> = 1).
For remapping operations, the 8-bit Program Space
Visibility register (PSVPAG) is used to define a
16K word page in the program space. When the Most
Significant bit of the EA is ‘1’, PSVPAG is concatenated
with the lower 15 bits of the EA to form a 23-bit program
space address. Unlike table operations, this limits
remapping operations strictly to the user memory area.
Table 3-37 and Figure 3-9 show how the program EA is
created for table operations and remapping accesses
from the data EA. Here, P<23:0> refers to a program
space word, whereas D<15:0> refers to a data space
word.
<22:16>
xxxx xxxx
PSVPAG<7:0>
xxxx
Program Space Address
ADDRESSING PROGRAM SPACE
xxxx
PC<22:1>
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
<15>
xxxx
© 2006 Microchip Technology Inc.
xxx xxxx xxxx xxxx
Data EA<15:0>
Data EA<15:0>
xxxx xxx0
Data EA<14:0>
<14:1>
(1)
<0>
0

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