PIC16F684-I/ML Microchip Technology Inc., PIC16F684-I/ML Datasheet - Page 101

• Manufacturer Part Number: PIC16F684-I/ML
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 12 I/O, QFN-16
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F684-I/ML

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 16-pin QFN
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

12.2
Brown-out Reset (BOR), Power-on Reset (POR) and
8 MHz internal oscillator (HFINTOSC) are factory cali-
brated. These calibration values are stored in fuses
located in the Calibration Word (2009h). The Calibra-
tion Word is not erased when using the specified bulk
erase sequence in the “PIC12F6XX/16F6XX Memory
Programming Specification” (DS41244) and thus, does
not require reprogramming.
12.3
The PIC16F684 differentiates between various kinds of
Reset:
a)
b)
c)
d)
e)
f)
FIGURE 12-1:
© 2007 Microchip Technology Inc.
MCLR/V
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
CLKI pin
OSC1/
V
Note 1:
DD
Calibration Bits
Reset
PP
pin
LFINTOSC
OST/PWRT
Refer to the Configuration Word register (Register 12-1).
Brown-out
V
Module
Detect
DD
WDT
Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
SBOREN
BOREN
Power-on Reset
External
Reset
SLEEP
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
WDT wake-up does not cause register resets in the
same manner as a WDT Reset since wake-up is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 12-2. Software can use
these bits to determine the nature of the Reset. See
Table 12-4 for a full description of Reset states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse-width specifications.
Enable PWRT
Enable OST
PIC16F684
S
R
DS41202F-page 99
Q
Chip_Reset