PI90LV017AUEX Pericom Semiconductor, PI90LV017AUEX Datasheet - Page 4

• Manufacturer Part Number: PI90LV017AUEX
• Description: IC LVDS DIFF LINE DVR 3V 8-MSOP
• Manufacturer: Pericom Semiconductor
• Type: Transceiverr

Specifications of PI90LV017AUEX

• Number Of Drivers/receivers: 1/0
• Protocol: LVDS
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Switching Characteristics
V
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Output short circuit current (I
11. C
12. All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
13. f
CC
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except:
V
All typicals are given for: V
The PI90LV031A/PI90LV027A/PI90LV017A are current mode devices and only functions within datasheet specifications when a resistive
load is applied to the driver outputs typical range is (90Ω to 110Ω).
t
going edge of the same channel.
t
t
delays. This specification applies to devices at the same Vcc and with 5°C of each other within the operating temperature range.
t
over recommended operating temperature and voltage ranges, and across process distribution. t
IMax - MinI differential propagation delay.
Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
Output Criteria: duty cycle = 45%/55%, V
= +3.3V ±10%, T
SKD
SKD
SKD
SKD
MAX
S
L
OD1
t
t
t
t
y
t
t
t
SKD
SKD
SKD
SKD
t
t
t
t
PHLD
PLHD
t
t
MAX
includes probe and jig capacitance.
TLH
THL
PHZ
PLZ
PZH
PZL
m
08-0295
1, It
2 is the Differential Channel-to-Channel Skew of any event on the same device.
3, Differential Part-to-Part Skew, is defined as the difference between the minimum and maximum specified differential propagation
4, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices
b
and ΔV
generator input conditions: t
2
3
4
1
l o
PHLD
OD1
- t
C
i D
i D
D
i D
i D
R
F
D
D
E
E
M
PLHD
.
l l a
n
n
a h
e s i
f i
s i
s i
A
e f f
e f f
e f f
e f f
x a
b a
b a
r e f
b a
b a
n n
= -40°C to +85°C (Notes 3,9,11)
T
m i
e r
e r
e r
e r
T
e l
e l
I is the magnitude difference in differential propagation delay time between the positive going edge and the negative
n e
m i
e l
e l
- l e
m i
t n
t n
t n
t n
u
T
T
a i t
e
m
T
T
l a i
l a i
l a i
l a i
e
o t
m i
m i
m i
m i
P l
O
C -
e
e
r P
r P
a P
a P
CC
e
e
p
u
OS
Z
Z
h
p o
p o
i H
L
r e
e s l
- t r
- t r
n a
= +3.3V, T
o
o t
o t
) is specified as magnitude only, minus sign indicates direction only.
h g
i t a
g a
g a
o t
o t
w
e n
S
R
i H
L
g n
P -
P -
i t a
i t a
e k
o t
o t
S l
o
= t
h g
w
n o
n o
t r a
t r a
F
w
Z
Z
e k
F
e r
P
It
D
D
S
S
a
< 1ns, (0% to 100%), 50% duty cycle, 0V to 3V.
w
u q
PHLD
OD
A
a r
e k
e k
l e
l e
(
) 6
n e
= +25°C.
y a
y a
m
w
w
> 250mV, all channels switching.
y c
t e
t -
i H
L
(
(
) 8
) 7
1 (
r e
o
h g
PLHD
w
) 3
o t
o t
I
(
L
i H
) 5
o
h g
w
4
O
3V LVDS High-Speed Differential Line Drivers
= 50Ω, tr ≤ 1ns, and t
F (
F (
PI90LV031A / PI90LV027A / PI90LV017A
R
R
C
C
g i
C
g i
L
L
o
L
r u
L
r u
=
=
n
=
s e
=
s e
d
1
1
t i
1
1
0 0
0 0
2
4
o i
p 0
p 0
&
&
s n
Ω,
Ω,
F
F
SKD
) 3
) 5
f
4 is defined as
≤ 1ns.
M
2
0
0
0
0
0
0
0 0
8 .
8 .
. n i
T
. 1
. 1
. 0
. 0
. 0
2
0
y
0 5
7 0
8 3
0 4
8 1
5 2
1 .
. p
PS8422D
M
2
2
0
0
1
1
1
1
7
7
5
5
a
0 .
0 .
4 .
5 .
0 .
2 .
5 .
5 .
. x
U
M
11/11/08
n
s n
H
s t i
z