ISL3179EFUZ-T Intersil, ISL3179EFUZ-T Datasheet - Page 6

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ISL3179EFUZ-T

Manufacturer Part Number
ISL3179EFUZ-T
Description
TXRX ESD 3.3V RS-485/422 8-MSOP
Manufacturer
Intersil
Type
Transceiverr
Datasheet

Specifications of ISL3179EFUZ-T

Number Of Drivers/receivers
1/1
Protocol
RS422, RS485
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Electrical Specifications
NOTES:
10. Set the RE signal high time >700ns to ensure that the device enters SHDN.
12. V
13. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
Test Circuits and Waveforms
11. This is the part-to-part skew between any two units tested with identical test conditions (Temperature, V
Receiver Enable to Output Low
Receiver Disable from Output High
Receiver Disable from Output Low
Time to Shutdown
Receiver Enable from Shutdown to
Output High
Receiver Enable from Shutdown to
Output Low
3. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
4. Supply current specification is valid for loaded drivers when DE = 0V.
5. Applies to peak current. See “Typical Performance Curves” on page 11 for more information.
6. Because of the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
7. Because of the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
8. These IC’s are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not
9. Keep RE = V
otherwise specified.
to enter shutdown. If the inputs are in this state for at least 700ns, the parts are guaranteed to have entered shutdown. See “Low Power
Shutdown Mode” on page 10.
characterization and are not production tested.
CC
V
CC
= 3.3V ±5%
PARAMETER
DE
DI
CC
FIGURE 1A. V
, and set the DE signal low time >700ns to ensure that the device enters SHDN.
D
Z
Y
6
OD
V
Test Conditions: V
OD
t
t
SYMBOL
ZH(SHDN)
ZL(SHDN)
AND V
t
SHDN
t
t
t
HZ
ZL
LZ
OC
R
R
L
L
R
(Note 7)
R
R
(Note 8)
R
(Notes 8, 10)
R
(Notes 8, 10)
/2
/2
L
L
L
L
L
FIGURE 1. DC DRIVER TEST CIRCUITS
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
CC
V
OC
ISL3179E, ISL3180E
= 3.0V to 3.6V; Typicals are at V
L
L
L
L
L
TEST CONDITIONS
= 15pF, SW = V
= 15pF, SW = GND (Figure 6)
= 15pF, SW = V
= 15pF, SW = GND (Figure 6),
= 15pF, SW = V
CC
CC
CC
V
CC
(Figure 6),
(Figure 6)
(Figure 6),
DE
DI
FIGURE 1B. V
CC
= 3.3V, T
D
Z
Y
TEMP
(°C)
Full
Full
Full
Full
Full
Full
A
OD
= +25°C. (Note 3) (Continued)
WITH COMMON MODE LOAD
CC
(Note 13)
V
OD
MIN
, etc.).
60
-
-
-
-
-
TYP
R
10
10
11
L
-
-
-
= 60Ω
(Note 13) UNITS
MAX
1000
1000
600
15
15
15
375Ω
375Ω
-7V TO +12V
April 22, 2008
FN6365.2
V
ns
ns
ns
ns
ns
ns
CM

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