MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 100

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

Operating Modes and On-Chip Memory
4.8.3 CONFIG Register Programming
4.8.4 RAM and EEPROM Security
Technical Data
100
Address: $0035
The CONFIG register is implemented with EEPROM cells, so EEPROM
procedures are required to change it. CONFIG can be programmed or
erased (including byte erase) while the MCU is operating in any mode,
provided that PTCON in BPROT is clear.
PTCON — Protect for CONFIG Bit
To change the value in the CONFIG register, complete this procedure.
Do not initiate a reset until the procedure is complete.
The NOSEC bit in the CONFIG register enables and disables an optional
security feature which protects the contents of EEPROM and RAM from
unauthorized access. This is done by restricting operation to single-chip
modes, preventing the memory locations from being monitored
externally. Single-chip modes do not allow visibility of the internal
address and data buses. Resident programs, however, have unlimited
access to the internal EEPROM and RAM and can read, write, or
transfer the contents of these memories.
Reset:
Read:
Write:
•
•
•
0 = CONFIG register can be programmed or erased normally.
1 = CONFIG register cannot be programmed or erased.
Erase the CONFIG register.
Program the new value to the CONFIG address.
Initiate reset.
Operating Modes and On-Chip Memory
BULKP
Bit 7
1
Figure 4-12. Block Protect Register (BPROT)
LVPEN
6
1
BPRT4
5
1
PTCON
4
1
BPRT3
3
1
BPRT2
2
1
M68HC11K Family
BPRT1
1
1
MOTOROLA
BPRT0
Bit 0
1