MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 110

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

Resets and Interrupts
5.3.3.3 Arm/Reset COP Timer Circuitry Register
5.3.4 Clock Monitor Reset
Technical Data
110
NOTE:
Address: $003A
To prevent a COP reset, this sequence must be completed:
Performing instructions between these two steps is possible as long as
both steps are completed in the correct sequence before the timer times
out.
The clock monitor can serve as a backup for the COP system. Its circuit
is based on an internal RC time delay. If no MCU clock edges are
detected within this RC time delay, the clock monitor generates a system
reset. Because the COP needs a clock to function, it is disabled when
the clocks stop. Thus, the clock monitor system can detect clock failures
not detected by the COP system.
Reset:
Figure 5-3. Arm/Reset COP Timer Circuitry Register (COPRST)
Read:
Write:
1. Write $55 to COPRST to arm the COP timer clearing mechanism.
2. Write $AA to COPRST to clear the COP timer.
Bit 7
Bit 7
0
Resets and Interrupts
Bit 6
6
0
Bit 5
5
0
Bit 4
4
0
Bit 3
3
0
Bit 2
2
0
M68HC11K Family
Bit 1
1
0
MOTOROLA
Bit 0
Bit 0
0