MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 164

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MC68HC711KS2MFN4

Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet

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MC68HC711KS2MFN4
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Serial Communications Interface (SCI)
7.9.5 Serial Communication Status Register 2
Technical Data
164
Address $0075
FE — Framing Error Flag
PF — Parity Error Flag
RAF — Receiver Active Flag
Reset:
Read:
Write:
FE is set when a 0 is detected where a stop bit (logic 1) was expected.
PF is set if received data has incorrect parity. Clear PF by reading
SCSR1.
RAF is a read-only bit.
0 = Stop bit detected
1 = Logic 0 detected at the end of a character
0 = Parity disabled
1 = Parity enabled
0 = Receiver is inactive.
1 = A character is being received.
Serial Communications Interface (SCI)
Bit 7
0
1
Figure 7-10. SCI Status Register 2 (SCSR2)
= Unimplemented
6
0
1
5
0
0
4
0
0
3
0
0
2
0
0
M68HC11K Family
1
0
0
MOTOROLA
Bit 0
RAF
0

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