MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 165

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MC68HC711KS2MFN4

Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet

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MC68HC711KS2MFN4
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7.9.6 Serial Communications Data Register
M68HC11K Family
MOTOROLA
Address $0076
Address $0077
The SCDR is a parallel register that performs two functions. Received
data in the RDR is read from this address when the SCI is receiving, and
data to be transmitted is written to this address when the SCI is
transmitting.
R8 and T8 — Receiver Bit 8 and Transmitter Bit 8
R/T[7:0] — Receiver/Transmitter Bits [7:0]
Reset:
Reset:
Read:
Read:
Write:
Write:
Ninth data bit is received or transmitted when the system is configured
for 8-bit data using mark address wakeup.
Serial Communications Interface (SCI)
R7/T7
Bit 7
Bit 7
R8
Figure 7-11. SCI Data Register (SCDR)
R6/T6
T8
6
6
R5/T5
5
0
5
Undefined after reset
Undefined after reset
R4/T4
4
0
4
Serial Communications Interface (SCI)
R3/T3
3
0
3
R2/T2
2
0
2
R1/T1
1
0
1
Technical Data
SCI Registers
R0/T0
Bit 0
Bit 0
0
165

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