MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 177

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MC68HC711KS2MFN4

Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet

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MC68HC711KS2MFN4
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8.6.3 Serial Peripheral Data Register
M68HC11K Family
MOTOROLA
Address: $002A
The SPDR is used when transmitting or receiving data on the serial bus.
Only a write to this register initiates transmission or reception of a byte,
and this only occurs in the master device. At the completion of
transferring a byte of data, the SPIF status bit is set in both the master
and slave devices.
A read of the SPDR is actually a read of a buffer. To prevent an overrun
and the loss of the byte that caused the overrun, the first SPIF must be
cleared by the time a second transfer of data from the shift register to the
read buffer is initiated.
A write to SPDR goes directly to the transmission shift register.
A read of the SPDR retrieves data from the read data buffer.
Reset:
Read:
Write:
Figure 8-5. Serial Peripheral Data Register (SPDR)
Bit 7
Bit 7
0
Serial Peripheral Interface (SPI)
Bit 6
6
0
Bit 5
5
0
Bit 4
4
0
Bit 3
3
0
Serial Peripheral Interface (SPI)
Bit 2
2
0
Bit 1
1
0
Technical Data
SPI Registers
Bit 0
Bit 0
0
177

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