MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 190

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

Timing System
9.4.4 Port A Data Direction Register
Technical Data
190
Address: $0001
PR[1:0] — Timer Prescaler Select Bits
DDA3 — Data Direction Control for Port A, Bit 3
Reset:
Read:
Write:
These bits determine the main timer prescale divisor, as shown in
Table
number to produce the clock which drives the free-running counter.
Refer to
In normal modes, PR[1:0] can be written only once, and the write must
be within 64 cycles after reset.
0 = PA3 configured as an input
1 = PA3 configured as an output
DDA7
Figure 9-6. Port A Data Direction Register (DDRA)
Bit 7
9-2. The system bus (E clock) frequency is divided by this
0
Table 9-1
DDA6
Timing System
6
0
PR[1:0]
for specific timing values.
Table 9-2. Timer Prescale
0 0
0 1
1 0
1 1
DDA5
5
0
DDA4
4
0
DDA3
3
0
Prescaler
16
1
4
8
DDA2
2
0
M68HC11K Family
DDA1
1
0
MOTOROLA
DDA0
Bit 0
0