MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 197

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MC68HC711KS2MFN4

Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet

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9.6.1 Timer Output Compare Registers
M68HC11K Family
MOTOROLA
Address: $0016 — TOC1 (High)
Address: $0017 — TOC1 (Low)
Address: $0018 — TOC2 (High)
Address: $0019 — TOC2 (Low)
Because the pin state changes occur at specific values of the
free-running counter, the pulse width can be controlled accurately to the
resolution of the free-running counter, independent of software
latencies. To generate an output signal of a specific frequency and duty
cycle, repeat this pulse-generating procedure.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
After a match occurs, change the appropriate OC1D bit to the
opposite polarity, then add a value representing the width of the
pulse to the original value and write it to the output compare
register.
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
1
1
1
1
Figure 9-13. Timer Output Compare
Bit 14
Bit 14
Bit 6
Bit 6
Timing System
6
1
1
1
1
Registers (TOC1–TOC4)
Bit 13
Bit 13
Bit 5
Bit 5
5
1
1
1
1
Bit 12
Bit 12
Bit 4
Bit 4
4
1
1
1
1
Bit 11
Bit 11
Bit 3
Bit 3
3
1
1
1
1
Bit 10
Bit 10
Bit 2
Bit 2
2
1
1
1
1
Output Compare (OC)
Bit 9
Bit 1
Bit 9
Bit 1
1
1
1
1
1
Timing System
Technical Data
Bit 0
Bit 0
Bit 0
Bit 8
Bit 8
1
1
1
1
197

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