MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 235

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MC68HC711KS2MFN4

Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet

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11.3.2.2 Memory Mapping Size Register
M68HC11K Family
MOTOROLA
Address: $002D
Address: $0056
PGAR[5:0] — Port G Pin Assignment Bits
The memory mapping size register (MMSIZ) sets the size of the
windows in use.
W2SZ[1:0] — Window 2 Size Bit
W1SZ[1:0] — Window 1 Size Bit
Reset:
Reset:
Read:
Read:
Write:
Write:
WxSZ[1:0]
These bits enable the memory windows and determine their size, as
shown in
0 = Corresponding port G pin is GPIO.
1 = Corresponding port G pin is expansion address line XA[18:13].
00
01
10
11
Figure 11-2. Memory Mapping Size Register (MMSIZ)
MXGS2
Memory Expansion and Chip Selects
Figure 11-1. Port G Assignment Register (PGAR)
Bit 7
Bit 7
0
0
Table
MXGS1
6
0
6
0
11-2.
Table 11-2. Window Size Select
16 K — Window can have up to 32 16-Kbyte banks
32 K — Window can have up to 16 32-Kbyte banks
8 K — Window can have up to 64 8-Kbyte banks
PGAR5
W2SZ1
5
0
5
0
PGAR4
W2SZ0
4
0
4
0
Window disabled
Window Size
PGAR3
Memory Expansion and Chip Selects
3
0
3
0
0
PGAR2
2
0
2
0
0
Memory Expansion
PGAR1
W1SZ1
1
0
1
0
Technical Data
PGAR0
W1SZ0
Bit 0
Bit 0
0
0
235

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