MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 46

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

Central Processor Unit (CPU)
3.2 Introduction
3.3 CPU Registers
Technical Data
46
15
7
A
This section presents information on M68HC11 central processor unit
(CPU) architecture, data types, addressing modes, the instruction set,
and special operations, such as subroutine calls and interrupts.
The CPU employs memory-mapped input/output (I/O). There are no
special instructions for I/O; all peripheral, I/O, and memory locations are
simply addresses in the 64-Kbyte memory map. This architecture also
enables access to operands from external memory locations with no
execution time penalty.
M68HC11 CPU registers are an integral part of the CPU and are not
addressed as memory locations. The seven registers are shown in
Figure
0
SP
PC
D
IX
IY
Figure 3-1. Programming Model
7
3-1.
7
S
X
Central Processor Unit (CPU)
H
I
B
N
Z
V
C
0
0
0
8-BIT ACCUMULATORS A & B
OR 16-BIT DOUBLE ACCUMULATOR D
INDEX REGISTER X
INDEX REGISTER Y
STACK POINTER
PROGRAM COUNTER
CONDITION CODES
CARRY/BORROW FROM MSB
OVERFLOW
ZERO
NEGATIVE
I-INTERRUPT MASK
HALF CARRY (FROM BIT 3)
X-INTERRUPT MASK
STOP DISABLE
M68HC11K Family
MOTOROLA