MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 78

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MC68HC711KS2MFN4

Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet

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Operating Modes and On-Chip Memory
4.5.3 Bootstrap Mode
Technical Data
78
Port B provides the high-order address byte (Addr[15:8]), port F the
low-order address byte (Addr[7:0]), port C the data bus (Data[7:0]), and
port G pin 7 the read/write line (R/W) which controls direction of data
flow.
Additionally, the E clock output can be used to synchronize external
decoders for enable signals.
Expanded mode also enables these two special features available only
on the K4 Family devices:
Both of these features are described in
and Chip
Resetting the MCU in special bootstrap mode selects a reset vector to a
special ROM bootloader program at addresses $BE00–$BFFF. The
bootloader program is used to download code, such as programming
algorithms, into on-chip RAM through the SCI. To do this:
When loading is complete, the MCU jumps to location $0080 and begins
executing the code. Interrupt vectors are directed to RAM, which allows
the use of interrupts through a jump table. The SCI transmitter requires
an external pullup resistor since it is part of port D, which the bootloader
configures for wired-OR operation.
1. Memory expansion uses port G[5:0] to increase the available
2. Four chip-select lines on port H[7:4] simplify selection of external
1. Send a synchronization character (see
2. Download up to 768 bytes (1 Kbyte for KS2) of program data,
external address space to 1 Mbyte.
memory devices.
receiver at the specified baud rate.
which the CPU places into RAM starting at $0080 and also echoes
back on the TxD signal. The bootloader program ends the
download after the RAM is full or when the received data line is
idle for at least four character times. See
Operating Modes and On-Chip Memory
Selects.
Section 11. Memory Expansion
Table
Table
4-2) to the SCI
4-2.
M68HC11K Family
MOTOROLA

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