MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 87
MC68HC711KS2MFN4
Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711KS2MFN4.pdf
(290 pages)
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4.6.2 ROM or EPROM
4.6.3 EEPROM
M68HC11K Family
MOTOROLA
NOTE:
The presence and location of the 24-Kbyte (EP)ROM on the [7]11K4 is
determined by two bits in the system configuration register (CONFIG).
The CONFIG register is a special EEPROM register (see
(EP)ROM is present in the memory map when the ROMON bit is set and
removed from the memory map when the bit is cleared. The default
location of this memory is $A000–$FFFF, but it can be moved to
$2000–$7FFF in expanded mode by clearing the ROMAD bit. Both bits
are set out of reset in single-chip mode.
In special test mode, the ROMON bit is forced to 0, removing (EP)ROM
from the memory map.
The M68HC11K Family devices contain 640 bytes of EEPROM. It is
initially located at $0D80 after reset if it is enabled by the EEON bit in the
CONFIG register (see
boundary ($xD80) by writing to the EEPROM mapping register (INIT2)
(see
On the M68HC11K devices, the EEPROM can be mapped to where it
will contain the vector space.
•
Figure
On the [7]11KS2, (EP)ROM is 32 K, mapped to $8000–$FFFF by
default, and moved to $0000–$7FFF by clearing the ROMAD bit.
Operating Modes and On-Chip Memory
4-7).
Figure
4-6). It can be relocated to any 4-K
Operating Modes and On-Chip Memory
Figure
Technical Data
Memory Map
4-6).
87
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