A3PE-BRD600-SKT MICROSEMI, A3PE-BRD600-SKT Datasheet
A3PE-BRD600-SKT
Specifications of A3PE-BRD600-SKT
Related parts for A3PE-BRD600-SKT
A3PE-BRD600-SKT Summary of contents
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ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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Actel Corporation, Mountain View, CA 94043-4655 © 2006 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 50200048-2 Release: April 2009 No part of this document may be copied or reproduced in any form or ...
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... Contents and System Requirements . . . . . . . . . . . . . . . . . . . . . . . 7 2 Hardware Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ProASIC3/E Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Detailed Board Description and Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 PLL Parts/Usage on ProASIC3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Programming the A3PE-A3P-EVAL-BRD1 with a FlashPro3 . . . . . . . . . . . . . . . . . . 15 Clock Circuits LED Device Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Switches Device Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 FPGA – LCD Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 LCD Power Supply Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 LVDS Channels ...
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... Step 7 – Generate the Programming File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Step 8 – Program the Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 8 Test Procedures for Board Testing . . . . . . . . . . . . . . . . . . . . . . . . 67 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Equipment Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Test Procedure for the A3PE-A3P-EVAL-BRD1 . . . . . . . . . . . . . . . . . . . . . . . . 67 A PQ208 Package Connections for A3PE600 and A3P250 Devices . . . . . . . . 71 208-Pin PQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 B Board Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Top-Level View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 ProASIC3 Schematics ...
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... Integrated Design Environment (IDE) suite. Chapter 7 – “Quick Start Tutorial” Chapter 8– “Test Procedures for Board Testing” manufacturer's testing facility on the ProASIC3/E Evaluation Board with silkscreen labeling A3PE-A3P-EVAL-BRD- 1 REV3. Appendix A – “PQ208 Package Connections for A3PE600 and A3P250 Devices” connections. ...
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Contents and System Requirements This chapter details the contents of the ProASIC3/E Starter Kit and lists the power supply and software system requirements. Starter Kit Contents The starter kit includes the following: • ProsASIC3/E Evaluation Board • Libero IDE Gold ...
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... Large LCD alphanumeric display to facilitate detailed message outputs from the FPGA application For further information, refer to the following appendices: Appendix A – “PQ208 Package Connections for A3PE600 and A3P250 Devices” on page Appendix B – “Board Schematics” on page Detailed Board Description and Usage The ProASIC3 Starter kit board has various advanced features that are covered in later sections of this chapter ...
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Hardware Components Full schematics are available on the Starter Kit Tutorial CD that is supplied with the Starter Kit. The schematics are also available for download from the Actel website. The electronic versions of the dedicated schematics can naturally be ...
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... We do not connect these voltages by default on the board for three reasons: 1. The PLC analog voltage rails are not available on A3P devices, only on A3PE in the PQ208 package. Only the west side PLL, namely PLF, is available on A3P devices in PQ208. In A3P devices, the pins are used as general I/Os. The same board is used for A3PE and A3P devices ...
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Hardware Components technology. These voltage banks are not all required for general use of ProASIC3 silicon. They are provided purely for illustrative purposes Supply 2 A Max To use the ProASIC3/E Evaluation board with a wall mount ...
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The board must be powered-up during programming because the chip needs its core voltages to be provided and VJTAG must be detected by the FlashPro3 programmer in order for it to set its JTAG signal voltages to the right level. ...
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... To determine if the board is a Rev3 board: A Rev3 Board is recognized by examining the front of the board and looking for the part number just beneath the large Actel corporate logo on the board top silk-screen. The part number will be A3PE-A3P-EVAL-BRD1 followed by REV3. To chain Rev3 boards together: All boards from the board nearest the FlashPro3 programmer should have the shunt that is placed by default on pins 3 and 4 of the J5 header moved to connect pins 1 and 2 ...
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... STAPL file in the FlashPro software. Selecting the PROGRAM action will erase, program, and verify the part (note that Verify is disabled with A3PE600 RevC silicon). With RevC silicon the overall programming time for an A3PE600-PQ208 will be 2 minutes, 4 seconds. With RevD silicon, the time will be approximately 30 seconds. ...
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Hardware Components The momentary push button switches (SW5 and SW6, for applying a reset pulse and a global pulse) are connected via jumpers JP15 and JP16 to I/Os 159 and 113 respectively. Again, all labeling is clearly shown on the ...
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... An unprogrammed or tristated output may show a faintly lit LED. Note: If the I/O voltage of Bank 5 (on A3PE, set by SW8) or Bank 2 (A3P, set by SW8 and SW7 being at the same level) is not at least 2.5 V, the LEDs will not illuminate. A setting of 1 the voltage bank will cause extremely faint illumination ...
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Hardware Components To use the device I/O for other purposes, remove the jumpers. Switches Device Connections Four switches are connected to the device via jumpers. If the jumpers are in place, the device I/O can be driven by the switches ...
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FPGA – LCD Interface An 8 × 1 LCD module is provided on the ProASIC3 Evaluation board for demonstrating the board’s functionality. 2-3 provides detailed information about the LCD module. Part Number Manufacturer Name Display Type Display Mode Display Format ...
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... The LVDS signals are driven using 8 differential pairs (consisting of 16 I/O pins) from the west side (Bank6 and Bank7) of the FPGA device A3PE600-PQ208. These 16 signals are terminated on the J40 and J41 connectors. The FPGA Pins used for LVDS signaling are listed in The LVDS signals are terminated on J40 and J41 connectors so that a standard patch cable can be used for doing loop- back testing ...
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The 4 differential pairs (consisting of 8 I/O pins) are terminated as shown in first RJ45 connector (which we’ll call “CAT 5E Primary” for the purposes of differentiating it). White/Orange Orange White/Green Blue White/Blue Green White/Brown Brown Notes: 1. TXn+ ...
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... Notes: 1. Pin names are valid only for the A3PE600-PQ208 part. They are not correct for use with an A3P250. 2. J40 – RJ45 connector is referred as CAT 5E PRIMARY connector. 3. J41 – RJ45 connector is referred as CAT 5E SECONDARY connector Refer to the PCB layout, 22 and VMV voltages of Bank6 and Bank7 (west side) are connected to a fixed 2.5 volts, which is Table 2-7 · ...
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... A3PE600-PQ208 fitted on the board. Use TOP_A3P.stp with an A3P250-PQ208 fitted on the board. This design is currently implemented for the A3PE600 die size. For a device of a different size possible to recompile the design into other device sizes. For information about retargeting the device, refer to the http://www ...
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Description of Test Design This description of the test design is provided with the Starter Kit. This design contains a data generator block for LEDs, clock divider, and an LCD display block. A block diagram of the design is shown ...
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Description of Test Design A message is generated and displayed on the demo board LCD display. A state machine controls the LDC module. Press SW1 Press SW2 Press SW3 Press SW4 Press SW5 Press SW6 Change Hex Switch setting (U13 ...
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The state diagram is shown in ProASIC3/E Starter Kit User’s Guide and Tutorial Figure 4-3. write1 home1 home2 warmup setfund Figure 4-3. LCD State Diagram setmode2 setmode1 clear2 clear1 27 ...
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... LVDS signal quality in order to meet the performance criteria. Test Setup Hardware The test setup uses a ProASIC3 Dev-Kit containing an A3PE600-PQ208 engineering sample. LVDS loopback is closed using various lengths of CAT-5E cables (1-, 3-, and 6-foot). The measurements are taken using a 1159A-1GHz Agilent differential probe. ...
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LVDS Signal Evaluation Measurement Results Figure 5-2 shows the LVDS signal across the 100 Ohm termination resistor at 300 Mb/s. height across the termination is about 275 mV which is well within the LVDS spec. 30 Figure 5-2. LVDS Signal ...
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Actel VHDL ProASIC3/E Design Flow This chapter introduces the design flow for VHDL using the Actel Libero IDE software suite. This chapter also briefly describes how to use the software tools and provides information about the sample design. VHDL-based design ...
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Actel VHDL ProASIC3/E Design Flow Design Entry Design entry consists of capturing a schematic representation of the design and performing functional simulations with a test bench. Design Capture For schematic capture, Libero uses ViewDraw® for Actel, which includes a schematic ...
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Design Implementation During design implementation, Actel Designer places-and-routes the design. Place-and-Route Start Designer from Libero IDE to place-and-route the design. Timing Simulation Perform timing simulation on the design after place-and-route in Designer. Timing simulation requires information extracted and back-annotated from ...
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Quick Start Tutorial This tutorial illustrates a VHDL design for a ProASIC3/E starter kit board. The design is created in Actel Libero IDE v6.2. The steps involved are as follows: “Step 1 – Create a New Project” “Step 2 – ...
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... Quick Start Tutorial 6. Select your project Family, Die, and Package. For this tutorial, you can select ProASIC3E, the A3PE600 die, and 208 PQFP for the package (Figure 7-3). 36 (Figure 7-2), or select ProASIC3, the A3P250 die, and 208 PQFP for the package Figure 7-2 ...
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Click Next to select Integrated Tools in the New Project Wizard Figure 7-4. Selected Integrated Tools in New Project Wizard (Libero IDE) 8. Click the Restore Defaults button to use the default tools included with Libero IDE. 9. Click ...
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Quick Start Tutorial 12. Click Add Files in the New Project Wizard to add existing project design files. Include any ACTgen cores, Block Symbol Files, Schematic Files, VHDL Packages, HDL Source Files, Implementation files, and Stimulus Files (Figure 7-6). 13. ...
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To add HDL to your project: 1. From the File menu, click New. This opens the New dialog box, as shown in 2. Select VHDL Entity in the File Type field, enter count8 in the Name field, and click OK. ...
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Quick Start Tutorial elsif (Sload = '1') then Qaux <= UNSIGNED(Data); elsif (Clock'event and Clock = '1') then if (Updown = '0') then Qaux <= Qaux + 1; else Qaux <= Qaux - 1; end if; end if; end process; ...
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Check the HDL in the file before you continue. In the Design Hierarchy or File Manager tab click count8.vhd and select Check HDL file. This checks the syntax of the count8.vhd file. Before moving to the next section, modify ...
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Quick Start Tutorial 2. Draw Waveforms 3. Export the Testbench Import Signal Information To launch WaveFormer Lite and import signal information: Right-click the Top.vhd file in the Design Hierarchy tab and select Create Stimulus > HDL Source files (source files). ...
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Copy Waveforms It is possible to copy and paste sections of waveforms onto (overwrite) or into (insert) any signal in the diagram. To copy and paste waveform sections: 1. Select the names of the required signals signals are ...
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Quick Start Tutorial The list box at the bottom of the dialog determines which signal the copied waveforms will be pasted into. To change this mapping: 1. Select a line in the list box. This places the destination signal in ...
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Double-click any clock segment to edit the clock parameters This creates the waveform shown in 3. Click the HIGH state button before you start to draw the SW4 waveform. If you have not selected any other state buttons since ...
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Quick Start Tutorial 4. Click and drag in the SW4 signal to draw a high segment from μs. When you release the mouse button, WaveFormer Lite switches your state to LOW. 5. Click and drag in the ...
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Select Stimulus HDL file from the File Type list, enter test_tbench for the name, and click OK. The file opens in the HDL Editor. 3. Create the VHDL testbench and save it. Pre-Synthesis Simulation Once you generate a testbench, ...
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Quick Start Tutorial 4. Select test_tbench.vhd in the Stimulus files in the project list box and click Add to add the file to the Associated Files list. 5. Click OK. Stimulus icons in the Design flow window turn green to ...
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From the ModelSim menu, select Simulate > Run > Run All to execute the full simulation time defined in the testbench. Scroll in the Wave window to verify that the design functions properly the ModelSim window, select ...
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... From the Project menu, select Implementation Options. This displays the Options for the Implementation dialog box, as shown in 50 Figure 7-25. Figure 7-25. Synplify Main Window Figure 7-26 for A3PE600 and Figure 7-27 Figure 7-26. Options for Implementation Dialog Box-A3PE600 for A3P250. ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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... Set the following in the dialog box: Technology: Actel ProASIC3E (set by Libero IDE) Part: A3PE600 Fan-out Guide: 12 (default) Hard Limit to Fan-out: Off (default). This refers to the fan-out limit. Accept the default values for each of the other tabs in the Options for Implementation dialog box and click OK. ...
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... Hierarchy tab and select Run Designer. Designer Wizard (Figure 7-29 on page 53 52 (Figure 7-28) reads in the design file and opens the Device Selection for A3PE600 and Figure 7-30 on page 53 Figure 7-28. Designer GUI ProASIC3/E Starter Kit User’s Guide and Tutorial for A3P250). ...
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... Use the default I/O settings and click Next. 4. Use the default Junction Temperature and Voltage setup and click Finish. ProASIC3/E Starter Kit User’s Guide and Tutorial Step 5 – Implement the Design with Designer Figure 7-29. Device Selection Wizard-A3PE600 Figure 7-30. Device Selection Wizard—A3P250 53 ...
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Quick Start Tutorial 5. Click the Compile icon. Leave the default Compile settings Designer compiles the design and shows the utilization of the selected device. Also, note that the Compile icon in Designer turns green, indicating that the compile has ...
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Another way to assign pin location is to import the Physical Design Constraint (PDC) file as a source file for Compilation. From the Designer menu, select File > Import Source File 10. Select row 2, then click Add. Browse ...
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Quick Start Tutorial 12. In Designer, click Layout. This opens the Layout Options dialog box shown in 13. Click OK to accept the default layout options. This runs place-and-route on the design. The Layout icon turns green to indicate that ...
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From Designer, click Back-Annotate in the Design Flow window. This opens the Back-Annotate dialog box, shown in Figure 7-36. 15. Accept the default settings and click OK. The Back-Annotate icon turns green. 16. Save and close Designer. From the ...
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Quick Start Tutorial Step 7 – Generate the Programming File 1. Open the Top.adb file in Designer and click the Programming File icon in the Design Flow window, which opens the Flash Point window 2. Click Finish, and then the ...
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In the Port list, select the USB port. The FlashPro3 programmer is connected as shown in Figure 7-39. Connect to Programmer Dialog Box for ProASIC3/E Devices 3. In the Configuration list, select ProASIC3/E. 4. Click Connect. A successful connection, ...
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... If you have an A3P250 device on board, you will see the message shown in 3. Select the A3PE600 or the A3P250 from the Device list. If only one device is present in the chain, performing Analyze Chain will select that device automatically from the Device list. Loading the STAPL File The FlashPro3 programmer uses a STAPL (* ...
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... Browse to your Libero IDE project /designer/impl1 folder, select the STAPL file, and click Open. The FlashPro software loads the file. Note: You can also find a copy of the Top.stp file in the /src/A3PE600 or /src/A3P250 folder. The FlashPro Log window will display a message indicating that the software has successfully loaded, as shown in Figure 7-44 ...
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Quick Start Tutorial Selecting an Action After loading the STAPL file, select an action from the Action list. See Option QUERY_SECURITY ERASE READ_IDCODE VERIFY PROGRAM DEVICE_INFO ERASE_FROM PROGRAM_FROM VERIFY_FROM PROGRAM_ARRAY ERASE_ARRAY VERIFY_ARRAY PROGRAM ERASE_ALL ACTION_VERIFY READ_IDCODE ENC_DATA_AUTHENTICATION PROGRAM_SECURITY DEVICE_INFO Programming ...
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... In the Device list, select the A3P250 device (or A3PE600 if your board has an A3PE600 device). 3. Click the Execute button in the toolbar. 4. The Execute Action dialog box appears, as shown in All the steps of the programming sequence are listed. Grayed out options are required for programming and cannot be changed ...
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... If the STAPL file is different from the file used for programming, Exit 11 will appear in the Log window. Note: Do not interrupt the verifying sequence, it may damage the device. Note: If you have an A3PE600 device on board, you will see A3PE600 in the Device list. Saving Your Log File All FlashPro3 results are displayed in the Log window. Save these results into a file. 64 Figure 7-47 ...
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... Select a directory, type in the file name, and click Save. The FlashPro software saves the file. Check Functionality of Tutorial Design After programming the device, you will see “ACTEL A3PE STARTER KIT” display on the LCD panel as well as flashing LEDs. There are 6 switches (SW) equipped with special functions. ...
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... Plug the +9 V power supply into the wall. 3. Take an A3PE-A3P-EVAL-BRD1 that has an empty socket. Make sure the switch SW11 is in the OFF position, (the switch should be moved to the left). This corresponds with the labeling of the silkscreen on the board. 4. Connect + output of the CUI power supply to the J18 connector on the board. You should observe the red LED at the top right of the board, i ...
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... If very dim, stop, switch off the board and rotate the switches one quarter turn clockwise before switching board back on. Continue if the LEDs are glowing. If unable to get a display on the LEDs, the board must be tagged as bad. 11 bad board, carefully remove the A3PE600-PQ208 or A3P250-PQ208 silicon from the socket and set it aside in an electrostatic-safe area. Using another piece of pre-programmed silicon, repeat steps above. ...
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... It may safely be left there. Repeat the Analyze Chain command message appears indicating that an A3PE600 or A3P250 part (depending on the device fitted to the board) has been detected, then the board has passed this test. Leave the silicon in place in the socket and move to the next step. ...
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... PQ208 Package Connections for A3PE600 and A3P250 Devices Due to the comprehensive and flexible nature of ProASIC3 device user I/Os, a naming scheme is used to show the details of the I/O. The name identifies to which I/O bank it belongs, as well as the pairing and pin polarity for differential I/Os. ...
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... Pin Number 208-Pin PQFP Figure A-1. 208-Pin PQFP Table A-1 · Device Connections for 208-Pin PQFP 208-Pin PQFP A3PE600 Function GND GND GNDQ GAA2/IO118PDB3 VMV7 IO118NDB3 GAB2/IO133PSB7V1 GAB2/IO117PDB3 GAA2/IO134PDB7V1 IO117NDB3 A3P250 Function ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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... Table A-1 · Device Connections for 208-Pin PQFP (Continued) Pin Number ProASIC3/E Starter Kit User’s Guide and Tutorial 208-Pin PQFP A3PE600 Function A3P250 Function IO134NDB7V1 GAC2/IO116PDB3 GAC2/IO132PDB7V1 IO116NDB3 IO132NDB7V1 IO115PDB3 IO130PDB7V1 IO115NDB3 IO130NDB7V1 IO114PDB3 IO127PDB7V1 IO114NDB3 IO127NDB7V1 IO113PDB3 IO126PDB7V0 IO113NDB3 IO126NDB7V0 IO112PDB3 IO124PSB7V0 IO112NDB3 GND GND CCI CCI ...
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... Table A-1 · Device Connections for 208-Pin PQFP (Continued) Pin Number 208-Pin PQFP A3PE600 Function A3P250 Function IO112PDB6V1 IO104PDB3 IO112NDB6V1 IO104NDB3 IO108PSB6V0 IO103PSB3 CCI CCI GND GND IO106PDB6V0 IO101PDB3 IO106NDB6V0 IO101NDB3 GEC1/IO104PDB6V0 GEC1/IO100PDB3 GEC0/IO104NDB6V0 GEC0/IO100NDB3 GEB1/IO103PPB6V0 GEB1/IO99PDB3 GEA1/IO102PPB6V0 GEB0/IO99NDB3 GEB0/IO103NPB6V0 GEA1/IO98PDB3 GEA0/IO102NPB6V0 ...
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... Table A-1 · Device Connections for 208-Pin PQFP (Continued) Pin Number ProASIC3/E Starter Kit User’s Guide and Tutorial 208-Pin PQFP A3PE600 Function A3P250 Function IO94PDB5V1 IO88RSB2 IO92NDB5V1 IO87RSB2 IO92PDB5V1 IO86RSB2 IO88NDB5V0 IO85RSB2 IO88PDB5V0 IO84RSB2 CCI CCI IO85NPB5V0 IO83RSB2 IO84NPB5V0 IO82RSB2 IO85PPB5V0 IO81RSB2 IO84PPB5V0 IO80RSB2 IO83NPB5V0 IO79RSB2 IO82NPB5V0 IO78RSB2 ...
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... PQFP A3PE600 Function A3P250 Function IO68NDB4V0 GDC2/IO63RSB2 GND GND GDA2/IO68PDB4V0 GDB2/IO62RSB2 GDB2/IO69PSB4V0 GDA2/IO61RSB2 GNDQ GNDQ TCK TCK TDI TDI TMS TMS VMV4 VMV2 ...
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... ProASIC3/E Starter Kit User’s Guide and Tutorial 208-Pin PQFP A3PE600 Function A3P250 Function IO53NDB3V0 IO53NDB1 GCA2/IO53PDB3V0 GCC2/IO53PDB1 GCA1/IO52PPB3V0 GCB2/IO52PSB1 GND GND V GCA2/IO51PSB1 CCPLC GCA0/IO52NPB3V0 GCA1/IO50PDB1 ...
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... PQFP A3PE600 Function A3P250 Function GND GND VMV1 NC GNDQ GBA1/IO40RSB0 GBA1/IO35PDB1V1 GBA0/IO39RSB0 GBA0/IO35NDB1V1 GBB1/IO38RSB0 GBB1/IO34PDB1V1 GBB0/IO37RSB0 GND GND GBB0/IO34NDB1V1 GBC1/IO36RSB0 GBC1/IO33PDB1V1 GBC0/IO35RSB0 ...
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... ProASIC3/E Starter Kit User’s Guide and Tutorial 208-Pin PQFP A3PE600 Function A3P250 Function CCI CCI IO15PDB0V2 IO16RSB0 IO15NDB0V2 IO15RSB0 IO13PDB0V2 IO14RSB0 IO13NDB0V2 IO13RSB0 ...
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Board Schematics This appendix provides illustrations of the ProASIC3/E Evaluation Board. Note: The following figures are in low resolution. If you would like to see the figures in high resolution, refer to the ProASIC3 Starter Kit Board proasic3_starter.aspx#docs. Top-Level View ...
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Figure B-1. Top-Level View of ProASIC3/E Evaluation Board ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial Figure B-2. Bottom-Level View of ProASIC3/E Evaluation Board ProASIC3 Schematics 83 ...
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GND4 ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial Figure B-4. ProASIC3 FPGA ProASIC3 Schematics 85 ...
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Figure B-5. LED and LCD Module Interface ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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Figure B-7. FPGA Headers and Expansion Bus ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial VCC GND VCC GND ...
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Figure B-9. JTAG and JTAG DaisyChain Connector 3 ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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Figure B-11. LVDS Signal Routing Via CAT-5E Connectors ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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Signal Layers This is a six-layer board. The board has the following layers of copper: Layer 1 – Top signal layer Layer 2 – Ground plane Layer 3 – Signal layer 3, used for LVDS receive and other signals Layer ...
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Figure C-1. Layer 1 – Top Signal Layer ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial Figure C-2. Layer 2 – Ground Plane (Blank) 95 ...
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Figure C-3. Layer 3 – Signal 3 (LVDS Receive Layer) ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial Figure C-4. Layer 4 – (LVDS Transmit Layer) 97 ...
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Figure C-5. Layer 5 – Power Plane (Blank) ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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ProASIC3/E Starter Kit User’s Guide and Tutorial Figure C-6. Layer 6 – Bottom 99 ...
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Figure C-7. Layer 6 – Bottom (Viewed from Bottom) ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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Product Support Actel backs its products with various support services including Customer Service, a Customer Technical Support Center, a web site, an FTP site, electronic mail, and worldwide sales offices. This appendix contains information about contacting Actel and using these ...
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Phone Our Technical Support Center answers all calls. The center retrieves information, such as your name, company name, phone number and your question, and then issues a case number. The Center then forwards the information to a queue where the ...
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Index A Actel electronic mail 101 telephone 102 web-based technical support 101 website 101 Assumptions 5 B Back-Annotated Timing 57 C ChipEdit 55 clock circuits 17 40MHz oscillator 17 contacting Actel customer service 101 electronic mail 101 telephone 102 web-based ...
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Index V VHDL APA design flow 31 104 W WaveFormer Lite 41 waveforms 42 web-based technical support 101 ProASIC3/E Starter Kit User’s Guide and Tutorial ...
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Actel is the leader in low-power and mixed-signal FPGAs and offers the most comprehensive portfolio of system and power management solutions. Power Matters. Learn more at www.actel.com. Actel Corporation • 2061 Stierlin Court • Mountain View, CA 94043 • USA ...