PIC16F688-I/SL Microchip Technology Inc., PIC16F688-I/SL Datasheet - Page 36

• Manufacturer Part Number: PIC16F688-I/SL
• Description: 14 PIN, 7 KB FLASH, 256 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F688-I/SL

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin SOIC-N
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F688
4.2
Every PORTA pin on the PIC16F688 has an interrupt-
on-change option and a weak pull-up option. PORTA
also provides an Ultra Low-Power Wake-up option. The
next three sections describe these functions.
4.2.1
The ANSEL register is used to configure the Input
mode of an I/O pin to analog. Refer to Register 4-3.
Setting the appropriate ANSEL bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSEL bits has no affect on digital
output functions. A pin with TRIS clear and ANSEL set
will still operate as a digital output, but the Input mode
will be analog. This can cause unexpected behavior
when executing read-modify-write instructions on the
affected port.
4.2.2
Each of the PORTA pins, except RA3, has an
individually configurable internal weak pull-up. Control
bits WPUAx enable or disable each pull-up. Refer to
Register 4-4. Each weak pull-up is automatically turned
off when the port pin is configured as an output. The
pull-ups are disabled on a Power-on Reset by the
RAPU bit of the OPTION register. A weak pull-up is
automatically enabled for RA3 when configured as
MCLR and disabled when RA3 is an I/O. There is no
software control of the MCLR pull-up.
REGISTER 4-3:
DS41203B-page 34
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
R/W-1
ANS7
Additional Pin Functions
Setting a pin to an analog input automatically disables the digital input circuitry, weak pull-ups and
interrupt-on-change, if available. The corresponding TRIS bit must be set to Input mode in order to allow
external control of the voltage on the pin.
ANSEL REGISTER
WEAK PULL-UPS
ANS<7:0>: Analog Select bits
Analog select between analog or digital function on pins AN<7:0>, respectively.
1 = Analog input. Pin is assigned as analog input
0 = Digital I/O. Pin is assigned to port or special function.
R/W-1
ANS6
ANSEL: ANALOG SELECT REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-1
ANS5
R/W-1
ANS4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
4.2.3
Each of the PORTA pins is individually configurable as
an interrupt-on-change pin. Control bits IOCAx enable
or disable the interrupt function for each pin. Refer to
Register 4-5. The interrupt-on-change is disabled on a
Power-on Reset.
For enabled interrupt-on-change pins, the values are
compared with the old value latched on the last read of
PORTA. The ‘mismatch’ outputs of the last read are
OR’d together to set the PORTA Change Interrupt Flag
bit (RAIF) in the INTCON register.
This interrupt can wake the device from Sleep. The user,
in the Interrupt Service Routine, clears the interrupt by:
a)
b)
A mismatch condition will continue to set flag bit RAIF.
Reading PORTA will end the mismatch condition and
allow flag bit RAIF to be cleared. The latch holding the
last read value is not affected by a MCLR nor BOR
Reset. After these Resets, the RAIF flag will continue
to be set if a mismatch is present.
ANS3
(1)
Note:
.
Any read or write of PORTA. This will end the
mismatch condition, then
Clear the flag bit RAIF.
INTERRUPT-ON-CHANGE
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RAIF
interrupt flag may not get set.
R/W-1
ANS2
© 2006 Microchip Technology Inc.
x = Bit is unknown
R/W-1
ANS1
R/W-1
ANS0
bit 0