PIC16F688-I/SL Microchip Technology Inc., PIC16F688-I/SL Datasheet - Page 73

• Manufacturer Part Number: PIC16F688-I/SL
• Description: 14 PIN, 7 KB FLASH, 256 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F688-I/SL

• A/d Inputs: 8-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin SOIC-N
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

8.2.6
The following registers are used to control the operation of the ADC.
REGISTER 8-1:
REGISTER 8-2:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3-0
ADFM
R/W-0
U-0
—
ADC REGISTER DEFINITIONS
ADFM: A/D Conversion Result Format Select bit
1 = Right justified
0 = Left justified
VCFG: Voltage Reference bit
1
0
Unimplemented: Read as ‘0’
CHS<2:0>: Analog Channel Select bits
000 = AN0
001 = AN1
010 = AN2
011 = AN3
100 = AN4
101 = AN5
110 = AN6
111 = AN7
GO/DONE: A/D Conversion Status bit
1
0
ADON: ADC Enable bit
1 = ADC is enabled
0 = ADC is disabled and consumes no operating current
Unimplemented: Read as ‘0’
ADCS<2:0>: A/D Conversion Clock Select bits
000 = F
001 = F
010 = F
x11 = F
100 = F
101 = F
110 = F
Unimplemented: Read as ‘0’
=
=
=
=
ADCS2
VCFG
This bit is automatically cleared by hardware when the A/D Conversion has completed.
R/W-0
R/W-0
V
V
A/D Conversion cycle in progress. Setting this bit starts an A/D Conversion cycle.
A/D Conversion completed/not in progress
REF
DD
ADCON0: A/D CONTROL REGISTER 0
ADCON1: A/D CONTROL REGISTER 1
OSC
OSC
OSC
RC
OSC
OSC
OSC
pin
(clock derived from a dedicated internal oscillator = 500 kHz max)
/2
/8
/32
/4
/16
/64
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
ADCS1
R/W-0
U-0
—
ADCS0
CHS2
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
CHS1
R/W-0
U-0
—
CHS0
R/W-0
U-0
—
x = Bit is unknown
x = Bit is unknown
PIC16F688
GO/DONE
R/W-0
U-0
—
DS41203C-page 71
ADON
R/W-0
U-0
—
bit 0
bit 0