PIC32MX664F064LT-I/PT Microchip Technology Inc., PIC32MX664F064LT-I/PT Datasheet - Page 118

• Manufacturer Part Number: PIC32MX664F064LT-I/PT
• Description: 100 TQFP 12X12X1MM T/R, 100 PINS, 64KB FLASH, 32KB RAM, 80 MHZ, USB, ETHERNET, 4
• Manufacturer: Microchip Technology Inc.

Specifications of PIC32MX664F064LT-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: I2C/SPI/UART/USB
• Memory Type: Flash
• Number Of Bits: 32
• Package Type: 100-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 32K Bytes
• Speed: 80 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC32MX5XX/6XX/7XX
TABLE 7-1:
DS61156F-page 118
CT – Core Timer Interrupt
CS0 – Core Software Interrupt 0
CS1 – Core Software Interrupt 1
INT0 – External Interrupt 0
T1 – Timer1
IC1 – Input Capture 1
OC1 – Output Compare 1
INT1 – External Interrupt 1
T2 – Timer2
IC2 – Input Capture 2
OC2 – Output Compare 2
INT2 – External Interrupt 2
T3 – Timer3
IC3 – Input Capture 3
OC3 – Output Compare 3
INT3 – External Interrupt 3
T4 – Timer4
IC4 – Input Capture 4
OC4 – Output Compare 4
INT4 – External Interrupt 4
T5 – Timer5
IC5 – Input Capture 5
OC5 – Output Compare 5
SPI1E – SPI1 Fault
SPI1RX – SPI1 Receive Done
SPI1TX – SPI1 Transfer Done
U1E – UART1 Error
SPI3E – SPI3 Fault
I2C3B – I2C3 Bus Collision Event
U1RX – UART1 Receiver
SPI3RX – SPI3 Receive Done
I2C3S – I2C3 Slave Event
U1TX – UART1 Transmitter
SPI3TX – SPI3 Transfer Done
I2C3M – I2C3 Master Event
I2C1B – I2C1 Bus Collision Event
I2C1S – I2C1 Slave Event
I2C1M – I2C1 Master Event
CN – Input Change Interrupt
AD1 – ADC1 Convert Done
Note 1:
Interrupt Source
Not all interrupt sources are available on all devices. See
available peripherals.
INTERRUPT IRQ, VECTOR AND BIT LOCATION
(1)
IRQ
10
12
13
14
16
17
18
20
21
22
23
24
25
29
30
33
11
15
19
26
27
28
31
32
0
1
2
3
4
5
6
7
8
9
Highest Natural Order Priority
Number
Vector
10
12
13
14
15
16
17
18
19
20
21
22
23
23
23
24
24
24
25
25
25
26
27
11
0
1
2
3
4
5
6
7
8
9
IFS0<10>
IFS0<11>
IFS0<12>
IFS0<13>
IFS0<14>
IFS0<15>
IFS0<16>
IFS0<17>
IFS0<18>
IFS0<19>
IFS0<20>
IFS0<21>
IFS0<22>
IFS0<23>
IFS0<24>
IFS0<25>
IFS0<26>
IFS0<27>
IFS0<28>
IFS0<29>
IFS0<30>
IFS0<31>
IFS0<0>
IFS0<1>
IFS0<2>
IFS0<3>
IFS0<4>
IFS0<5>
IFS0<6>
IFS0<7>
IFS0<8>
IFS0<9>
IFS1<0>
IFS1<1>
Flag
Table
IEC0<10>
IEC0<12>
IEC0<13>
IEC0<14>
IEC0<15>
IEC0<16>
IEC0<17>
IEC0<18>
IEC0<19>
IEC0<20>
IEC0<21>
IEC0<22>
IEC0<23>
IEC0<24>
IEC0<25>
IEC0<26>
IEC0<27>
IEC0<28>
IEC0<29>
IEC0<30>
IEC0<31>
IEC0<11>
IEC0<0>
IEC0<1>
IEC0<2>
IEC0<3>
IEC0<4>
IEC0<5>
IEC0<6>
IEC0<7>
IEC0<8>
IEC0<9>
IEC1<0>
IEC1<1>
1,
Enable
Table 2
Interrupt Bit Location
and
IPC0<28:26>
IPC1<12:10>
IPC2<12:10>
IPC5<28:26>
© 2010 Microchip Technology Inc.
IPC0<12:10>
IPC0<20:18>
IPC1<20:18>
IPC1<28:26>
IPC2<20:18>
IPC2<28:26>
IPC3<12:10>
IPC3<20:18>
IPC3<28:26>
IPC4<12:10>
IPC4<20:18>
IPC4<28:26>
IPC5<12:10>
IPC5<20:18>
IPC5<28:26>
IPC5<28:26>
IPC6<12:10>
IPC6<12:10>
IPC6<12:10>
IPC6<20:18>
IPC6<28:26>
IPC0<4:2>
IPC1<4:2>
IPC2<4:2>
IPC3<4:2>
IPC4<4:2>
IPC5<4:2>
IPC6<4:2>
IPC6<4:2>
IPC6<4:2>
Priority
Table 3
for the list of
IPC0<17:16>
IPC0<25:24>
IPC1<17:16>
IPC1<25:24>
IPC2<17:16>
IPC2<25:24>
IPC3<17:16>
IPC3<25:24>
IPC4<17:16>
IPC4<25:24>
IPC5<17:16>
IPC5<25:24>
IPC5<25:24>
IPC5<25:24>
IPC6<17:16>
IPC6<25:24>
Sub-Priority
IPC1<9:8>
IPC2<9:8>
IPC0<1:0>
IPC0<9:8>
IPC1<1:0>
IPC2<1:0>
IPC3<1:0>
IPC3<9:8>
IPC4<1:0>
IPC4<9:8>
IPC5<1:0>
IPC5<9:8>
IPC6<1:0>
IPC6<1:0>
IPC6<1:0>
IPC6<9:8>
IPC6<9:8>
IPC6<9:8>