PIC32MX664F064LT-I/PT Microchip Technology Inc., PIC32MX664F064LT-I/PT Datasheet - Page 119

• Manufacturer Part Number: PIC32MX664F064LT-I/PT
• Description: 100 TQFP 12X12X1MM T/R, 100 PINS, 64KB FLASH, 32KB RAM, 80 MHZ, USB, ETHERNET, 4
• Manufacturer: Microchip Technology Inc.

Specifications of PIC32MX664F064LT-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: I2C/SPI/UART/USB
• Memory Type: Flash
• Number Of Bits: 32
• Package Type: 100-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 32K Bytes
• Speed: 80 MHz
• Temperature Range: –40 to +85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

TABLE 7-1:
© 2010 Microchip Technology Inc.
PMP – Parallel Master Port
CMP1 – Comparator Interrupt
CMP2 – Comparator Interrupt
U3E – UART2A Error
SPI2E – SPI2 Fault
I2C4B – I2C4 Bus Collision Event
U3RX – UART2A Receiver
SPI2RX – SPI2 Receive Done
I2C4S – I2C4 Slave Event
U3TX – UART2A Transmitter
SPI2TX – SPI2 Transfer Done
IC4M – I2C4 Master Event
U2E – UART3A Error
SPI4E – SPI4 Fault
I2C5B – I2C5 Bus Collision Event
U2RX – UART3A Receiver
SPI4RX – SPI4 Receive Done
I2C5S – I2C5 Slave Event
U2TX – UART3A Transmitter
SPI4TX – SPI4 Transfer Done
IC5M – I2C5 Master Event
I2C2B – I2C2 Bus Collision Event
I2C2S – I2C2 Slave Event
I2C2M – I2C2 Master Event
FSCM – Fail-Safe Clock Monitor
RTCC – Real-Time Clock and
Calendar
DMA0 – DMA Channel 0
DMA1 – DMA Channel 1
DMA2 – DMA Channel 2
DMA3 – DMA Channel 3
DMA4 – DMA Channel 4
DMA5 – DMA Channel 5
DMA6 – DMA Channel 6
DMA7 – DMA Channel 7
FCE – Flash Control Event
USB – USB Interrupt
CAN1 – Control Area Network 1
CAN2 – Control Area Network 2
ETH – Ethernet Interrupt
IC1E – Input Capture 1 Error
IC2E – Input Capture 2 Error
IC3E – Input Capture 3 Error
IC4E – Input Capture 4 Error
Note 1:
Interrupt Source
Not all interrupt sources are available on all devices. See
available peripherals.
INTERRUPT IRQ, VECTOR AND BIT LOCATION (CONTINUED)
(1)
IRQ
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Number
Vector
28
29
30
31
31
31
32
32
32
33
33
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
13
17
5
9
IFS1<25>
IFS1<10>
IFS1<11>
IFS1<12>
IFS1<13>
IFS1<14>
IFS1<15>
IFS1<16>
IFS1<17>
IFS1<18>
IFS1<19>
IFS1<20>
IFS1<21>
IFS1<22>
IFS1<23>
IFS1<24>
IFS1<26>
IFS1<27>
IFS1<28>
IFS1<29>
IFS1<30>
IFS1<31>
IFS1<2>
IFS1<3>
IFS1<4>
IFS1<5>
IFS1<6>
IFS1<7>
IFS1<8>
IFS1<9>
IFS2<0>
PIC32MX5XX/6XX/7XX
Flag
Table
IEC1<10>
IEC1<11>
IEC1<12>
IEC1<13>
IEC1<14>
IEC1<15>
IEC1<16>
IEC1<17>
IEC1<18>
IEC1<19>
IEC1<20>
IEC1<21> IPC10<12:10>
IEC1<22> IPC10<20:18> IPC10<17:16>
IEC1<23> IPC10<28:26> IPC10<25:24>
IEC1<24>
IEC1<25> IPC11<12:10>
IEC1<26> IPC11<20:18> IPC11<17:16>
IEC1<27> IPC11<28:26> IPC11<25:24>
IEC1<28>
IEC1<29>
IEC1<30>
IEC1<31>
IEC1<2>
IEC1<3>
IEC1<4>
IEC1<5>
IEC1<6>
IEC1<7>
IEC1<8>
IEC1<9>
IEC2<0>
1,
Enable
Table 2
Interrupt Bit Location
and
IPC7<12:10>
IPC7<20:18>
IPC7<28:26>
IPC7<28:26>
IPC7<28:26>
IPC8<12:10>
IPC8<12:10>
IPC8<12:10>
IPC8<20:18>
IPC8<28:26>
IPC9<12:10>
IPC9<20:18>
IPC9<28:26>
IPC1<12:10>
IPC2<12:10>
IPC3<12:10>
IPC4<12:10>
IPC12<4:2>
IPC10<4:2>
IPC11<4:2>
IPC7<4:2>
IPC8<4:2>
IPC8<4:2>
IPC8<4:2>
IPC9<4:2>
Priority
Table 3
for the list of
DS61156F-page 119
IPC7<17:16>
IPC7<25:24>
IPC7<25:24>
IPC7<25:24>
IPC8<17:16>
IPC8<25:24>
IPC9<17:16>
IPC9<25:24>
Sub-Priority
IPC10<1:0>
IPC10<9:8>
IPC12<1:0>
IPC11<1:0>
IPC11<9:8>
IPC7<1:0>
IPC7<9:8>
IPC8<1:0>
IPC8<1:0>
IPC8<1:0>
IPC8<9:8>
IPC8<9:8>
IPC8<9:8>
IPC9<1:0>
IPC9<9:8>
IPC1<9:8>
IPC2<9:8>
IPC3<9:8>
IPC4<9:8>