PIC32MX664F064LT-I/PT Microchip Technology Inc., PIC32MX664F064LT-I/PT Datasheet - Page 98

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PIC32MX664F064LT-I/PT

Manufacturer Part Number
PIC32MX664F064LT-I/PT
Description
100 TQFP 12X12X1MM T/R, 100 PINS, 64KB FLASH, 32KB RAM, 80 MHZ, USB, ETHERNET, 4
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC32MX664F064LT-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Eeprom Memory
0 Bytes
Input Output
85
Interface
I2C/SPI/UART/USB
Memory Type
Flash
Number Of Bits
32
Package Type
100-pin TQFP
Programmable Memory
64K Bytes
Ram Size
32K Bytes
Speed
80 MHz
Temperature Range
–40 to +85 °C
Timers
5-16-bit
Voltage, Range
2.3-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX664F064LT-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 4-36:
TABLE 4-37:
Legend:
Note
Legend:
Note
61C0 CNCON
61D0
61E0
61C0 CNCON
61D0
61E0
1:
1:
CNPUE
CNPUE
CNEN
CNEN
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
CHANGE NOTICE AND PULL-UP REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L,
PIC32MX575F256L, PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L,
PIC32MX695F512L, PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512 AND PIC32MX795F512L DEVICES
CHANGE NOTICE AND PULL-UP REGISTER MAP FOR PIC32MX575F256H, PIC32MX575F512H, PIC32MX675F256H,
PIC32MX675F512H, PIC32MX695F512H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES
CNPUE15 CNPUE14 CNPUE13 CNPUE12 CNPUE11 CNPUE10
CNPUE15 CNPUE14 CNPUE13 CNPUE12 CNPUE11 CNPUE10
CNEN15
CNEN15
31/15
31/15
ON
ON
CNEN14
CNEN14
30/14
30/14
FRZ
FRZ
CNEN13
CNEN13
29/13
29/13
SIDL
SIDL
CNEN12
CNEN12
28/12
28/12
CNEN11
CNEN11
27/11
27/11
CNEN10
CNEN10
26/10
26/10
CNPUE9
CNPUE9
CNEN9
CNEN9
25/9
25/9
CNPUE8
CNPUE8
CNEN8
CNEN8
24/8
24/8
Bits
Bits
CNPUE7
CNPUE7
CNEN7
CNEN7
23/7
23/7
CNPUE6
CNPUE6
CNEN6
CNEN6
22/6
22/6
CNPUE21
CNPUE5
CNPUE5
CNEN21
CNEN5
CNEN5
21/5
21/5
CNPUE20
CNPUE4
CNPUE4
CNEN20
CNEN4
CNEN4
20/4
20/4
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
CNPUE19 CNPUE18 CNPUE17 CNPUE16 0000
CNPUE3
CNPUE3
CNEN19
CNEN3
CNEN3
19/3
19/3
CNPUE18 CNPUE17 CNPUE16 0000
CNEN18
CNPUE2
CNEN18
CNPUE2
CNEN2
CNEN2
18/2
18/2
CNEN17
CNPUE1
CNEN17
CNPUE1
CNEN1
CNEN1
17/1
17/1
(1)
CNEN16
CNPUE0
CNEN16
CNPUE0
CNEN0
CNEN0
(1)
16/0
16/0
for more
for more
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000

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