IC DIFF LINE DVR/RCVR H-S 8-MSOP

SN65LVDS179DGKRG4

Manufacturer Part NumberSN65LVDS179DGKRG4
DescriptionIC DIFF LINE DVR/RCVR H-S 8-MSOP
ManufacturerTexas Instruments
Series65LVDS
TypeTransceiver
SN65LVDS179DGKRG4 datasheet
 


Specifications of SN65LVDS179DGKRG4

Number Of Drivers/receivers1/1ProtocolRS644
Voltage - Supply3 V ~ 3.6 VMounting TypeSurface Mount
Package / Case8-MSOP, Micro8™, 8-uMAX, 8-uSOP,Lead Free Status / RoHS StatusLead free / RoHS Compliant
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............................................................................................................................................................
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
FEATURES
1
Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
Full-Duplex Signaling Rates up to 100 Mbps
(See
Table
1)
Bus-Terminal ESD Exceeds 12 kV
Operates From a Single 3.3-V Supply
Low-Voltage Differential Signaling With Typical
Output Voltages of 350 mV and a 100-Ω Load
Propagation Delay Times
– Driver: 1.7 ns Typ
– Receiver: 3.7 ns Typ
Power Dissipation at 200 MHz
– Driver: 25 mW Typical
– Receiver: 60 mW Typical
LVTTL Input Levels Are 5-V Tolerant
Receiver Maintains High Input Impedance With
V
< 1.5 V
CC
Receiver Has Open-Circuit Fail Safe
DESCRIPTION
The SN65LVDS179, SN65LVDS180, SN65LVDS050,
and SN65LVDS051 are differential line drivers and
receivers that use low-voltage differential signaling
(LVDS) to achieve signaling rates as high as 400
Mbps (see the Application Information section). The
TIA/EIA-644 standard compliant electrical interface
provides a minimum differential output voltage
magnitude of 247 mV into a 100-Ω load and receipt
of 50-mV signals with up to 1 V of ground potential
difference between a transmitter and receiver.
The intended application of this device and signaling
technique
is
for
point-to-point
transmission over controlled impedance media of
approximately 100-Ω characteristic impedance. The
transmission media may be printed-circuit board
traces, backplanes, or cables. (Note: The ultimate
rate and distance of data transfer depends on the
attenuation characteristics of the media, the noise
coupling to the environment, and other application
specific characteristics).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LVDS179D (Marked as DL179 or LVD179)
SN65LVDS179DGK (Marked as S79)
V
GND
SN65LVDS180D (Marked as LVDS180)
SN65LVDS180PW (Marked as LVDS180)
GND
GND
SN65LVDS050D (Marked as LVDS050)
SN65LVDS050PW (Marked as LVDS050)
GND
SN65LVDS051D (Marked as LVDS051)
SN65LVDS051PW (Marked as LVDS051)
baseband
data
GND
SN65LVDS179, , SN65LVDS180
SN65LVDS050, SN65LVDS051
SLLS301P – APRIL 1998 – REVISED APRIL 2009
(TOP VIEW)
3
D
A
1
8
CC
R
B
2
7
2
D
Z
3
6
R
Y
4
5
(TOP VIEW)
NC
V
1
14
5
CC
D
R
V
2
13
CC
4
RE
A
3
12
DE
3
DE
B
4
11
RE
D
Z
2
5
10
R
Y
6
9
NC
7
8
15
(TOP VIEW)
1D
12
1B
V
1
16
DE
CC
9
1A
1D
2
15
2D
1R
1Y
3
14
RE
1Z
4
13
3
2R
DE
5
12
1R
2A
2Z
6
11
4
RE
2B
2Y
7
10
5
2D
8
9
2R
(TOP VIEW)
15
1D
1B
V
1
16
4
CC
1DE
1A
1D
2
15
3
1R
1Y
3
14
1R
1DE
1Z
4
13
2R
2DE
5
12
9
2D
2A
2Z
6
11
12
2B
2Y
7
10
2DE
8
9
2D
5
2R
Copyright © 1998–2009, Texas Instruments Incorporated
5
Y
6
Z
8
A
7
B
9
Y
10
Z
12
A
11
B
14
1Y
13
1Z
10
2Y
11
2Z
2
1A
1
1B
6
2A
7
2B
14
1Y
13
1Z
2
1A
1
1B
10
2Y
11
2Z
6
2A
7
2B

SN65LVDS179DGKRG4 Summary of contents

  • Page 1

    ... GND SN65LVDS051D (Marked as LVDS051) SN65LVDS051PW (Marked as LVDS051) baseband data GND SN65LVDS179, , SN65LVDS180 SN65LVDS050, SN65LVDS051 SLLS301P – APRIL 1998 – REVISED APRIL 2009 (TOP VIEW (TOP VIEW (TOP VIEW (TOP VIEW 1DE 1DE 2DE 2DE Copyright © 1998–2009, Texas Instruments Incorporated ...

  • Page 2

    ... SN65LVDS179DGK — SN65LVDS179 RECEIVER INPUTS ≥ < V < ≤ - Open (1) SN65LVDS179 DRIVER OUTPUTS SN65LVDS179 SN65LVDS180 SN65LVDS050 SN65LVDS051 www.ti.com Tx Buffer Only 400 Mbps 400 Mbps 400 Mbps 400 Mbps SMALL OUTLINE (PW) SN65LVDS050PW SN65LVDS051PW — SN65LVDS180PW (1) OUTPUT Copyright © 1998–2009, Texas Instruments Incorporated ...

  • Page 3

    ... Open X ( high level low level high impedance don't care, Off = no output EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS Input 7 V 300 k 300 k A Input 7 V Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): SN65LVDS180, SN65LVDS050, and (1) SN65LVDS051 RECEIVER INPUTS ≥ < ...

  • Page 4

    ... T = 85°C A (1) POWER RATING 383 mW 437 mW 330 mW/°C 513 mW/°C 577 mW/°C 220 mW MIN NOM MAX UNIT 3 3.3 3.6 2 0.8 0.1 0.6 520 -0.8 CC –40 85 °C Copyright © 1998–2009, Texas Instruments Incorporated ...

  • Page 5

    ... High-level input current IH I Low-level input current IL I Short-circuit output current OS I Off-state output current O(OFF) C Input capacitance IN Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): TEST CONDITIONS = 100 Ω 100 Ω 100 Ω 100 Ω L TEST CONDITIONS R = 100 Ω, See ...

  • Page 6

    ... V ±10 ±10 5 (1) MIN TYP MAX 1.7 2.7 1.7 2.7 0.8 1 0.8 1 300 150 4.3 10 3.1 10 (1) MIN TYP MAX 3.7 4.5 3.7 4.5 0.3 0.7 1.5 0.9 1.5 2.5 2 Copyright © 1998–2009, Texas Instruments Incorporated UNIT UNIT UNIT ...

  • Page 7

    ... All input pulses are supplied by a generator having the following characteristics: t (PRR Mpps, pulse width = 10 ± 0.2 ns. C the D.U.T. Figure 2. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s ...

  • Page 8

    ... V 1. dis includes instrumentation and fixture capacitance within 0, SN65LVDS179 SN65LVDS180 SN65LVDS050 SN65LVDS051 www.ti.com OC(PP) V OC(SS ≤ 1 ns, pulse repetition rate and input 0.8 V and input to DE ≤ 1 ns, pulse repetition rate Copyright © 1998–2009, Texas Instruments Incorporated ...

  • Page 9

    ... Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s Figure 5. Receiver Voltage Definitions RESULTING DIFFERENTIAL INPUT VOLTAGE (mV 100 –100 100 –100 100 – ...

  • Page 10

    ... D.U.T. Figure 6. Timing Test Circuit and Waveforms 10 Submit Documentation Feedback Product Folder Link(s PLH includes instrumentation and fixture capacitance within 0, the L Copyright © 1998–2009, Texas Instruments Incorporated SN65LVDS179 SN65LVDS180 SN65LVDS050 SN65LVDS051 www.ti.com –0 1 ≤ 1 ns, pulse repetition rate r f ...

  • Page 11

    ... All input pulses are supplied by a generator having the following characteristics: t (PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. C the D.U.T. V TEST PZL R V TEST PZH R Figure 7. Enable/Disable Time Test Circuit and Waveforms Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): B 500 includes instrumentation and fixture capacitance within 0, PZL V +0 ...

  • Page 12

    ... V O − Output Voltage − V Figure 8. 3 2.5 2 1 −4 SN65LVDS179 SN65LVDS180 SN65LVDS050 SN65LVDS051 www.ti.com 2.5 3 DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT = 3 −1 −3 −2 I − High-Level Output Current − Figure 10. Copyright © 1998–2009, Texas Instruments Incorporated 0 ...

  • Page 13

    ... HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 1.5 −50 −30 − − Free-Air Temperature − Figure 13. Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): HIGH-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT CURRENT 3 − LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME 2.5 2 1.5 ...

  • Page 14

    ... Submit Documentation Feedback Product Folder Link(s): RECEIVER vs FREE-AIR TEMPERATURE −50 −30 − − Free−Air Temperature − Figure 15. RECEIVER vs FREE-AIR TEMPERATURE 3 3 −50 −30 − − Free-Air Temperature − Figure 16. SN65LVDS179 SN65LVDS180 SN65LVDS050 SN65LVDS051 www.ti.com Copyright © 1998–2009, Texas Instruments Incorporated ...

  • Page 15

    ... running at 150 Mbps; Channel 1: R, Channel 2: Y only running at 150 Mbps; Channel only running at 400 Mbps; Channel 1: Y-Z Figure 18. Typical Eye Patterns SN65LVDS179 25°C; V Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): APPLICATION INFORMATION Bench Test Board Figure 17. Equipment Setup ...

  • Page 16

    ... Tx buffers only running at 400 Mbps; Channel 3: 1Y-1Z, Channel 4: 2Y-2Z, Figure 21. Typical Eye Patterns SN65LVDS051 25° Submit Documentation Feedback Product Folder Link(s): (b) CC (b) CC (b) CC Copyright © 1998–2009, Texas Instruments Incorporated SN65LVDS179 SN65LVDS180 SN65LVDS050 SN65LVDS051 www.ti.com (c) 23-1 = 3.6 V; PRBS = 2 ) (c) 23-1 = 3.6 V; PRBS = 2 ) ...

  • Page 17

    ... The presence of the termination resistor, Rt, does not affect the fail-safe function as long connected as shown in the figure. Other termination circuits may allow a dc current to ground that could defeat the pullup currents from the receiver and the fail-safe feature. Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): 30% Jitter ...

  • Page 18

    ... ACTIVE SN65LVDS051PW ACTIVE SN65LVDS051PWG4 ACTIVE SN65LVDS051PWR ACTIVE SN65LVDS051PWRG4 ACTIVE SN65LVDS179D ACTIVE SN65LVDS179DG4 ACTIVE SN65LVDS179DGK ACTIVE SN65LVDS179DGKG4 ACTIVE SN65LVDS179DGKR ACTIVE SN65LVDS179DGKRG4 ACTIVE SN65LVDS179DR ACTIVE SN65LVDS179DRG4 ACTIVE SN65LVDS180D ACTIVE PACKAGE OPTION ADDENDUM Package Package Pins Package Type Drawing Qty SOIC Green (RoHS & ...

  • Page 19

    Orderable Device Status SN65LVDS180DG4 ACTIVE SN65LVDS180DR ACTIVE SN65LVDS180DRG4 ACTIVE SN65LVDS180PW ACTIVE SN65LVDS180PWG4 ACTIVE SN65LVDS180PWR ACTIVE SN65LVDS180PWRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that ...

  • Page 20

    TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing SN65LVDS050DR SOIC SN65LVDS050PWR TSSOP PW SN65LVDS051DR SOIC SN65LVDS051PWR TSSOP PW SN65LVDS179DGKR MSOP DGK SN65LVDS179DR SOIC SN65LVDS180DR SOIC SN65LVDS180PWR TSSOP PW PACKAGE MATERIALS INFORMATION Pins SPQ Reel ...

  • Page 21

    Device Package Type SN65LVDS050DR SOIC SN65LVDS050PWR TSSOP SN65LVDS051DR SOIC SN65LVDS051PWR TSSOP SN65LVDS179DGKR MSOP SN65LVDS179DR SOIC SN65LVDS180DR SOIC SN65LVDS180PWR TSSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 2500 PW 16 2000 D ...

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    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...