ISPLSI2032E-110LJ44 Lattice, ISPLSI2032E-110LJ44 Datasheet - Page 10

• Manufacturer Part Number: ISPLSI2032E-110LJ44
• Description: CMOS ISP EEPLD, SMD, 2032, PLCC44
• Manufacturer: Lattice
• Series: SuperFASTr

Specifications of ISPLSI2032E-110LJ44

• No. Of Macrocells: 32
• No. Of I/o's: 34
• Propagation Delay: 10ns
• Global Clock Setup Time: 7.5ns
• Frequency: 110MHz
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C

Power consumption in the ispLSI 2032E device depends
on two primary factors: the speed at which the device is
operating and the number of Product Terms used.
Figure 3. Typical Device Power Consumption vs fmax
I
For 2032E-225 and -200: I CC = 4.5 + (# of PTs * 1.3) + (# of nets * Max freq * 0.0035)
For 2032E-180 and Slower: I CC = 4.5 + (# of PTs * 1.02) + (# of nets * Max freq * 0.0035)
Where:
The I
loads on average exists. These values are for estimates only. Since the value of I
conditions and the program in the device, the actual I
CC
Power Consumption
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
can be estimated for the ispLSI 2032E using the following equation:
CC
estimate is based on typical conditions (V
150
140
130
120
110
100
90
80
70
60
50
40
1
20
40
60
Notes: Configuration of two 16-bit counters
80
Typical current at 5V, 25°C
CC
100 120 140 160 180 200 220 240
CC
= 5.0V, room temperature) and an assumption of two GLB
f
max (MHz)
10
should be verified.
Figure 3 shows the relationship between power and
operating speed.
Specifications ispLSI 2032E
ispLSI 2032E-225 and -200
ispLSI 2032E-180
and Slower
CC
is sensitive to operating
0127A/2032E