EVAL-AD9838SDZ Analog Devices Inc, EVAL-AD9838SDZ Datasheet

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EVAL-AD9838SDZ

Manufacturer Part Number
EVAL-AD9838SDZ
Description
EVALUATION BOARD
Manufacturer
Analog Devices Inc
Series
-r
Datasheets

Specifications of EVAL-AD9838SDZ

Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9838
Primary Attributes
USB Powered or External Supply
Secondary Attributes
SPI Interface
Kit Application Type
Clock & Timing
Application Sub Type
Clock Generator
Kit Contents
Software CD, USB Cable
Silicon Manufacturer
Analog Devices
Silicon Core Number
AD9838
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
FEATURES
2.3 V to 5.5 V power supply
MCLK speed: 16 MHz (B grade), 5 MHz (A grade)
Output frequency up to 8 MHz
Sinusoidal and triangular outputs
On-board comparator
3-wire SPI interface
Extended temperature range: −40°C to +125°C
Power-down option
11 mW power consumption at 2.3 V
20-lead LFCSP
APPLICATIONS
Frequency stimulus/waveform generation
Frequency phase tuning and modulation
Low power RF/communications systems
Liquid and gas flow measurement
Sensory applications: proximity, motion, and defect detection
Test and medical equipment
GENERAL DESCRIPTION
The
performance sine and triangular outputs. It also has an on-board
comparator that allows a square wave to be produced for clock
generation. Consuming only 11 mW of power at 2.3 V, the
AD9838 is an ideal candidate for power-sensitive applications.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
AD9838
FSELECT
is a low power DDS device capable of producing high
MCLK
28-BIT FREQ0
28-BIT FREQ1
FSYNC
REG
REG
AVDD
SERIAL INTERFACE
CONTROL LOGIC
SCLK
AGND
AND
MUX
12-BIT PHASE0 REG
12-BIT PHASE1 REG
SDATA
DGND
16-BIT CONTROL
REGISTER
ACCUMULATOR
(28-BIT)
PHASE
REGULATOR
FUNCTIONAL BLOCK DIAGRAM
DVDD
PSELECT
CAP/2.5V
MUX
Σ
12
Figure 1.
VCC
2.5V
MUX
MUX
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
SLEEP RESET
ROM
Capability for phase modulation and frequency modulation is
provided. The frequency registers are 28 bits wide: with a 16 MHz
clock rate, resolution of 0.06 Hz can be achieved; with a 5 MHz
clock rate, the AD9838 can be tuned to 0.02 Hz resolution.
Frequency and phase modulation are configured by loading
registers through the serial interface and by toggling the registers
using software or the FSELECT and PSELECT pins, respectively.
The AD9838 is written to via a 3-wire serial interface. This serial
interface operates at clock rates up to 40 MHz and is compatible
with DSP and microcontroller standards.
The device operates with a power supply from 2.3 V to 5.5 V. The
analog and digital sections are independent and can be run from
different power supplies; for example, AVDD can equal 5 V with
DVDD equal to 3 V.
The AD9838 has a power-down pin (SLEEP) that allows external
control of the power-down mode. Sections of the device that are
not being used can be powered down to minimize current con-
sumption. For example, the DAC can be powered down when
a clock output is being generated.
The AD9838 is available in a 20-lead LFCSP_WQ package.
SIN
REFERENCE
ON-BOARD
11 mW Power, 2.3 V to 5.5 V,
DIVIDE
BY 2
MUX
MSB
REFOUT
FULL-SCALE
COMPARATOR
CONTROL
©2011 Analog Devices, Inc. All rights reserved.
10-BIT
DAC
FSADJUST
AD9838
Complete DDS
COMP
IOUT
IOUTB
SIGN BIT OUT
VIN
AD9838
www.analog.com

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EVAL-AD9838SDZ Summary of contents

Page 1

FEATURES 2 5.5 V power supply MCLK speed: 16 MHz (B grade), 5 MHz (A grade) Output frequency MHz Sinusoidal and triangular outputs On-board comparator 3-wire SPI interface Extended temperature range: −40°C to +125°C Power-down ...

Page 2

... Evaluation Board ............................................................................ 26   System Demonstration Platform.............................................. 26   AD9838 to SPORT Interface..................................................... 26   Evaluation Kit ............................................................................. 26   Crystal Oscillator vs. External Clock....................................... 26   Power Supply............................................................................... 26   Evaluation Board Schematics ................................................... 27   Evaluation Board Layout........................................................... 29 Outline Dimensions ....................................................................... 30 Ordering Guide .......................................................................... 30 Rev Page             ...

Page 3

SPECIFICATIONS AVDD = DVDD = 2 5.5 V, AGND = DGND = otherwise noted. Table 1. 1 Parameter SIGNAL DAC SPECIFICATIONS Resolution Update Rate A Grade B Grade 2 I Full Scale OUT V Maximum ...

Page 4

AD9838 1 Parameter LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current INH INL Input Capacitance POWER SUPPLIES AVDD DVDD Grade B Grade 5 ...

Page 5

TIMING CHARACTERISTICS DVDD = 2 5.5 V, AGND = DGND = 0 V, unless otherwise noted. Table 2. 1 Parameter Limit MIN MAX t 200/62 80/ 80/ ...

Page 6

AD9838 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter AVDD to AGND DVDD to DGND AVDD to DVDD AGND to DGND CAP/2.5V Digital I/O Voltage to DGND Analog I/O Voltage to AGND Operating Temperature Range ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 AVDD Positive Power Supply for the Analog Section. AVDD can have a value from 2 5 0.1 μF decoupling capacitor should ...

Page 8

AD9838 Pin No. Mnemonic Description 18 FSADJUST Full-Scale Adjust Control. A resistor (R of the full-scale DAC current. The relationship between R IOUT FULL SCALE FSADJUST = 1.14 V nominal REFOUT Voltage Reference Output. The AD9838 has an ...

Page 9

TYPICAL PERFORMANCE CHARACTERISTICS 6.0 5.5 VDD = 5V 5.0 VDD = 3V 4.5 4.0 3.5 3 MCLK FREQUENCY (MHz) Figure 6. Typical Current Consumption (I DD for f = MCLK/10 OUT 2.5 2.0 VDD ...

Page 10

AD9838 1.180 1.178 VDD = 2.7V 1.176 VDD = 5.0V 1.174 1.172 1.170 1.168 1.166 1.164 –40 – TEMPERATURE (°C) Figure 12. V vs. Temperature REF 0.20 0.18 DVDD = 3.3V 0.16 DVDD = 2.3V 0.14 ...

Page 11

FREQUENCY (MHz) Figure 18. Power vs. Frequency MHz, f MCLK Frequency Word = 0x2492492 2.28 MHz, OUT ...

Page 12

AD9838 TEST CIRCUIT 100nF R SET 6.8kΩ 10nF CAP/2.5V REFOUT FSADJUST ON-BOARD FULL-SCALE REGULATOR REFERENCE CONTROL 12 SIN 10-BIT DAC AD9838 ROM Figure 19. Test Circuit Used to Test Specifications Rev Page AVDD 10nF COMP ...

Page 13

TERMINOLOGY Integral Nonlinearity (INL) INL is the maximum deviation of any code from a straight line passing through the endpoints of the transfer function. The endpoints of the transfer function are zero scale, a point 0.5 LSB below the first ...

Page 14

AD9838 THEORY OF OPERATION Sine waves are typically thought of in terms of their magnitude form: a(t) = sin(ωt). However, sine waves are nonlinear and not easy to generate except through piecewise construction. On the other hand, the angular information ...

Page 15

CIRCUIT DESCRIPTION The AD9838 is a fully integrated direct digital synthesis (DDS) chip. The chip requires one reference clock, one low precision resistor, and eight decoupling capacitors to provide digitally created sine waves MHz. In addition to ...

Page 16

AD9838 The prominence of the aliased images depends on the ratio MCLK. If the ratio is small, the aliased images are very OUT prominent and of a relatively high energy level as determined by the sin(x)/x roll-off ...

Page 17

FUNCTIONAL DESCRIPTION SERIAL INTERFACE The AD9838 has a standard 3-wire serial interface that is compatible with the SPI, QSPI™, MICROWIRE®, and DSP interface standards. Data is loaded into the device as a 16-bit word under the control of a serial ...

Page 18

AD9838 Table 7. Control Register Bit Descriptions Bit Bit Name Description D13 B28 Two write operations are required to load a complete word into either of the frequency registers. B28 = 1 allows a complete word to be loaded into ...

Page 19

FREQUENCY AND PHASE REGISTERS The AD9838 contains two frequency registers and two phase registers, which are described in Table 8. Table 8. Frequency and Phase Registers Register Size Description FREQ0 28 bits Frequency Register 0. When the FSEL bit or ...

Page 20

AD9838 In some applications, the user does not need to alter all 28 bits of the frequency register. With coarse tuning, only the 14 MSBs are altered; with fine tuning, only the 14 LSBs are altered. By setting the B28 ...

Page 21

SIGN BIT OUT PIN The AD9838 offers a variety of outputs from the chip. The digital outputs are available from the SIGN BIT OUT pin. The available outputs are the comparator output or the MSB of the DAC data. The ...

Page 22

AD9838 OUT YES CHANGE FSEL/ FSELECT? YES CHANGE FREQUENCY REGISTER? CONTROL REGISTER (SEE TABLE 7) USING CONTROL BIT (CONTROL REGISTER WRITE) USING CONTROL BITS (CONTROL REGISTER WRITE) RESET BIT = 0 FSEL = SELECTED FREQUENCY REGISTER PSEL ...

Page 23

DATA WRITE NO WRITE A FULL 28-BIT WORD TO A FREQUENCY REGISTER FREQUENCY REGISTER? YES (CONTROL REGISTER WRITE) (CONTROL REGISTER WRITE) B28 (D13 WRITE TWO CONSECUTIVE 16-BIT WORDS (SEE TABLE 13 AND TABLE 14 (SEE TABLE ...

Page 24

AD9838 APPLICATIONS INFORMATION The various output options available from the AD9838 make the part suitable for a wide variety of applications, including modulation applications. The AD9838 can be used to perform simple modulation, such as frequency shift keying (FSK). More ...

Page 25

AD9838 to 68HC11/68L11 Interface Figure 28 shows the serial interface between the AD9838 and the 68HC11/68L11 microcontroller. The microcontroller is con- figured as the master by setting the MSTR bit in the SPCR to 1. This setting provides a serial ...

Page 26

... The schematics of the evaluation board are shown in Figure 33 and Figure 34. The software provided in the evaluation kit allows the user to easily program the AD9838 (see Figure 32). The evaluation soft- ware runs on any IBM-compatible PC with Microsoft® Windows® ...

Page 27

... EVALUATION BOARD SCHEMATICS Figure 33. Evaluation Board Schematic Rev Page AD9838 09077-042 ...

Page 28

AD9838 Figure 34. SDP Connector Schematic Rev Page 09077-043 ...

Page 29

... EVALUATION BOARD LAYOUT Figure 35. Evaluation Board Layout Rev Page AD9838 ...

Page 30

... AD9838BCPZ-RL7 −40°C to +125°C AD9838ACPZ-RL −40°C to +125°C AD9838ACPZ-RL7 −40°C to +125°C EVAL-AD9838SDZ RoHS Compliant Part. 2 The evaluation board for the AD9838 requires the system demonstration platform (SDP) board, which is sold separately. 4.10 0.30 4 ...

Page 31

NOTES Rev Page AD9838 ...

Page 32

AD9838 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09077-0-4/11(A) Rev Page ...

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